Accurate Phase Calibration for Digital Beam-Forming in Multi-Transceiver HF Radar System

The TIGER-3 radar is being developed as an “all digital” radar with 20 integrated digital transceivers, each connected to a separate antenna. Using phased array antenna techniques, radiated power is steered towards a desired direction based on the relative phases within the array elements. This paper proposes an accurate phase measurement method to calibrate the phases of the radio output signals using Field Programmable Gate Array (FPGA) technology. The method sequentially measures the phase offset between the RF signal generated by each transceiver and a reference signal operated at the same frequency. Accordingly, the transceiver adjusts its phase in order to align to the reference phase. This results in accurately aligned phases of the RF output signals and with the further addition of appropriate phase offsets, digital beamforming (DBF) can be performed steering the beam in a desired direction. The proposed method is implemented on a Virtex-5 VFX70T device. Experimental results show that the calibration accuracy is of 0.153 degrees with 14 MHz operating frequency

A Reconfigurable Beamformer for Audio Applications

Beamforming is a signal processing technique that improves the signal strength received from a specific location. It is already used for many decades in telecommunications, while over the last years, it has been adopted by the audio research society, mostly to enhance speech recognition. In this paper, we propose a scalable organization for a hardware time-invariant beamformer that can be used in small handheld devices and complete 3D-audio systems. Our design can be configured according to the number of input channels. Furthermore, all critical internal modules, such as decimators, FIR filters and interpolators can be adjusted to support various input sampling rates. We developed a hardware prototype in VHDL targeting the Xilinx ML410 board incorporating Virtex4 FX60 FPGA. Following a constrained approach regarding FPGA resource utilization, our hardware prototype occupies 21 % of the aforementioned FPGA when instantiating 16 beamforming modules, and consumes approximately 2 Watts of power. Furthermore, our design achieves a speedup of 28 compared to an OMPannotated software implementation running on a Pentium D at 3.4 GHz. We also compared our design against prior related work. Results suggest that it can extract an audio source up to 11 times faster compared to a reconfigurable adaptive beamformer, and up to 19 times faster compared to DSP implementations. 1