15 research outputs found

    Design and implementation of interface units for high speed fiber optics local area networks and broadband integrated services digital networks

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    The design and implementation of interface units for high speed Fiber Optic Local Area Networks and Broadband Integrated Services Digital Networks are discussed. During the last years, a number of network adapters that are designed to support high speed communications have emerged. This approach to the design of a high speed network interface unit was to implement package processing functions in hardware, using VLSI technology. The VLSI hardware implementation of a buffer management unit, which is required in such architectures, is described

    Scalable parallel communications

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    Coarse-grain parallelism in networking (that is, the use of multiple protocol processors running replicated software sending over several physical channels) can be used to provide gigabit communications for a single application. Since parallel network performance is highly dependent on real issues such as hardware properties (e.g., memory speeds and cache hit rates), operating system overhead (e.g., interrupt handling), and protocol performance (e.g., effect of timeouts), we have performed detailed simulations studies of both a bus-based multiprocessor workstation node (based on the Sun Galaxy MP multiprocessor) and a distributed-memory parallel computer node (based on the Touchstone DELTA) to evaluate the behavior of coarse-grain parallelism. Our results indicate: (1) coarse-grain parallelism can deliver multiple 100 Mbps with currently available hardware platforms and existing networking protocols (such as Transmission Control Protocol/Internet Protocol (TCP/IP) and parallel Fiber Distributed Data Interface (FDDI) rings); (2) scale-up is near linear in n, the number of protocol processors, and channels (for small n and up to a few hundred Mbps); and (3) since these results are based on existing hardware without specialized devices (except perhaps for some simple modifications of the FDDI boards), this is a low cost solution to providing multiple 100 Mbps on current machines. In addition, from both the performance analysis and the properties of these architectures, we conclude: (1) multiple processors providing identical services and the use of space division multiplexing for the physical channels can provide better reliability than monolithic approaches (it also provides graceful degradation and low-cost load balancing); (2) coarse-grain parallelism supports running several transport protocols in parallel to provide different types of service (for example, one TCP handles small messages for many users, other TCP's running in parallel provide high bandwidth service to a single application); and (3) coarse grain parallelism will be able to incorporate many future improvements from related work (e.g., reduced data movement, fast TCP, fine-grain parallelism) also with near linear speed-ups

    Multilevel Parallel Communications

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    The research reported in this thesis investigates the use of parallelism at multiple levels to realize high-speed networks that offer advantages in throughput, cost, reliability, and flexibility over alternative approaches. This research specifically considers use of parallelism at two levels: the upper level and the lower level. At the upper level, N protocol processors perform functions included in the transport and network layers. At the lower level, M channels provide data and physical layer functions. The resulting system provides very high bandwidth to an application. A key concept of this research is the use of replicated channels to provide a single, high bandwidth channel to a single application. The parallelism provided by the network is transparent to communicating applications, thus differentiating this strategy from schemes that provide a collection of disjoint channels between applications on different nodes. Another innovative aspect of this research is that parallelism is exploited at multiple layers of the network to provide high throughput not only at the physical layer, but also at upper protocol layers. Schedulers are used to distribute data from a single stream to multiple channels and to merge data from multiple channels to reconstruct a single coherent stream. High throughput is possible by providing the combined bandwidth of multiple channels to a single source and destination through use of parallelism at multiple protocol layers. This strategy is cost effective since systems can be built using standard technologies that benefit from the economies of a broad applications base. The exotic and revolutionary components needed in non-parallel approaches to build high speed networks are not required. The replicated channels can be used to achieve high reliability as well. Multilevel parallelism is flexible since the degree of parallelism provided at any level can be matched to protocol processing demands and application requirements

    Efficient Implementation of Estelle Specifications

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    Efficient implementation of communication software is of critical importance for high-speed networks. We analyze performance bottlenecks in existing implementations and propose two techniques for improvements: The first exploits parallelism not only in the actions of the FSMs, but also in the runtime system of the protocol stack. The second integrates adjacent layers leading to considerable savings in inter-layer interface handling and in the number of transitions occurring in the FSMs. Both techniques are discussed in the context of OSI upper layers, and are based on protocol specification in Estelle

    Hardware and software aspects of parallel computing

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    Part 1 (Chapters 2,3 and 4) is concerned with the development of hardware for multiprocessor systems. Some of the concepts used in digital hardware design are introduced in Chapter 2. These include the fundamentals of digital electronics such as logic gates and flip-flops as well as the more complicated topics of rom and programmable logic. It is often desirable to change the network topology of a multiprocessor machine to suit a particular application. The third chapter describes a circuit switching scheme that allows the user to alter the network topology prior to computation. To achieve this, crossbar switches are connected to the nodes, and the host processor (a PC) programs the crossbar switches to make the desired connections between the nodes. The hardware and software required for this system is described in detail. Whilst this design allows the topology of a multiprocessor system to be altered prior to computation, the topology is still fixed during program run-time. Chapter 4 presents a system that allows the topology to be altered during run-time. The nodes send connection requests to a control processor which programs a crossbar switch connected to the nodes. This system allows every node in a parallel computer to communicate directly with every other node. The hardware interface between the nodes and the control processor is discussed in detail, and the software on the control processor is also described. Part 2 (Chapters 5 and 6) of this thesis is concerned with the parallelisation of a large molecular mechanics program. Chapter 5 describes the fundamentals of molecular mechanics such as the steric energy equation and its components, force field parameterisation and energy minimisation. The implementation of a novel programming (COMFORT) and hardware (the BB08) environment into a parallel molecular mechanics (MM) program is presented in Chapter 6. The structure of the sequential version of the MM program is detailed, before discussing the implementation of the parallel version using COMFORT and the BB08

    Efficient Configuration of Protocol Software for Multiprocessors

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    Efficient implementation of communication software is of crucial importance for high-speed networks. One way to improve the runtime performance of protocol implementations in the network nodes is the use of parallelism. Formal description techniques like Estelle improve the specification process in many respects and allow for semiautomatic code generation. Therefore, they are now widely accepted. We present a code generator for Estelle that compiles and automatically configures protocol software for a multiprocessor. Software modules are distributed over the available processors and executed concurrently. We report performance results on a KSR1 with 28 available processors under the OSF/1 operating system

    Design and analysis of real-time multimedia synchronization protocol on the high-speed transport layer

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    The emerging high-speed computer network makes it possible to communicate using several heterogeneous data types called multimedia. The multimedia transmission in the computer communication network can be performed on the same channel or on several separate channels. Several problems exist with high-speed data transmission using a single channel. To overcome the problems, multiple separate channels are suggested for each data type. The multiple separate channels can be fine-tuned for the characteristics of each data type, but they introduce the synchronization problem if any timing relation exists between channels. The timing relation among packets at the source must be maintained (synchronized) at the destination to deliver meaningful information. It is also believed that the synchronization is to be performed on the transport layer of the protocol stack because the transport layer is the minimal layer for reliable end-to-end communication;A protocol that can handle the synchronization problem is designed. The protocol is implemented in a transport protocol and simulated using OPNET network simulation tool. The transport protocol is designed based on OSI-TP for future extensions of the high-speed implementation using multiprocessors

    Aspects of an open architecture robot controller and its integration with a stereo vision sensor.

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    The work presented in this thesis attempts to improve the performance of industrial robot systems in a flexible manufacturing environment by addressing a number of issues related to external sensory feedback and sensor integration, robot kinematic positioning accuracy, and robot dynamic control performance. To provide a powerful control algorithm environment and the support for external sensor integration, a transputer based open architecture robot controller is developed. It features high computational power, user accessibility at various robot control levels and external sensor integration capability. Additionally, an on-line trajectory adaptation scheme is devised and implemented in the open architecture robot controller, enabling a real-time trajectory alteration of robot motion to be achieved in response to external sensory feedback. An in depth discussion is presented on integrating a stereo vision sensor with the robot controller to perform external sensor guided robot operations. Key issues for such a vision based robot system are precise synchronisation between the vision system and the robot controller, and correct target position prediction to counteract the inherent time delay in image processing. These were successfully addressed in a demonstrator system based on a Puma robot. Efforts have also been made to improve the Puma robot kinematic and dynamic performance. A simple, effective, on-line algorithm is developed for solving the inverse kinematics problem of a calibrated industrial robot to improve robot positioning accuracy. On the dynamic control aspect, a robust adaptive robot tracking control algorithm is derived that has an improved performance compared to a conventional PID controller as well as exhibiting relatively modest computational complexity. Experiments have been carried out to validate the open architecture robot controller and demonstrate the performance of the inverse kinematics algorithm, the adaptive servo control algorithm, and the on-line trajectory generation. By integrating the open architecture robot controller with a stereo vision sensor system, robot visual guidance has been achieved with experimental results showing that the integrated system is capable of detecting, tracking and intercepting random objects moving in 3D trajectory at a velocity up to 40mm/s

    Robust linear and non-linear control of magnetically levitated systems

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    The two most advanced applications of contactless magnetic levitation are high-speed magnetic bearings and magnetically levitated vehicles (Maglev) for ground transportation using superconducting magnets and controlled d.c. electromagnets. The repulsion force from superconducting magnets provide stable levitation with low damping, while the suspension force generated by electromagnets is inherently unstable. This instability, due to the in verse force-distance relationship, requires the addition of feedback controllers to sustain stable suspension. The problem of controlling magnetically levitated systems using d.c. electromagnets under different operating conditions has been studied in this thesis with a design process primarily driven by experimental results from a representative single-magnet test rig and a multi-magnet vehicle. The controller-design stages are presented in detail and close relationships have been constructed between selection of performance criteria for the derivation process and desired suspension characteristics. Both linear and nonlinear stabilising compensators have been developed. Simulation and experimental results have been studied in parallel to assess operational stability and the main emphasis has been given to assessing performance under different operational conditions. For the experimental work, a new digital signal processor-based hardware platform has been designed, built with interface to Matlab/Simulink. The controller design methods and algorithmic work presented in this thesis can be divided into: non-adaptive, adaptive, optimal linear and nonlinear. Adaptive algorithms based on model reference control have been developed to improve the performance of the suspension system in the presence of considerable variations in external payload and force disturbances. New design methods for Maglev suspension have been developed using robust control theory (%oo and fi synthesis). Single- and multi-magnet control problems have been treated using the same framework. A solution to the Hoo controller-optimisation problem has been derived and applied to Maglev control. The sensitivity to robustness has been discussed and tools for assessing the robustness of the closed-loop system in terms of sustaining stability and performance in the presence of uncertainties in the suspension model have been presented. Multivariable controllers based on %00 and /i synthesis have been developed for a laboratory scale experimental vehicle weighing 88 kg with four suspension magnets, and experimental results have been derived to show superiority of the proposed design methods in terms of ability to deal with external disturbances. The concept of Hoo control has been extended to the nonlinear setting using the concepts of energy and dissipativity, and nonlinear state-feedback and out put-feed back controllers for Maglev have been developed and reported. Simulation and experimental results have been presented to show the improved performance of these controllers to attenuate guideway-induced disturbances while maintaining acceptable suspension qualities and larger operational bandwidth.EThOS - Electronic Theses Online ServiceGBUnited Kingdo
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