A Multi-objective Perspective for Operator Scheduling using Fine-grained DVS Architecture

The stringent power budget of fine grained power managed digital integrated circuits have driven chip designers to optimize power at the cost of area and delay, which were the traditional cost criteria for circuit optimization. The emerging scenario motivates us to revisit the classical operator scheduling problem under the availability of DVFS enabled functional units that can trade-off cycles with power. We study the design space defined due to this trade-off and present a branch-and-bound(B/B) algorithm to explore this state space and report the pareto-optimal front with respect to area and power. The scheduling also aims at maximum resource sharing and is able to attain sufficient area and power gains for complex benchmarks when timing constraints are relaxed by sufficient amount. Experimental results show that the algorithm that operates without any user constraint(area/power) is able to solve the problem for most available benchmarks, and the use of power budget or area budget constraints leads to significant performance gain.Comment: 18 pages, 6 figures, International journal of VLSI design & Communication Systems (VLSICS

A virtual power plant model for time-driven power flow calculations

This paper presents the implementation of a custom-made virtual power plant model in OpenDSS. The goal is to develop a model adequate for time-driven power flow calculations in distribution systems. The virtual power plant is modeled as the aggregation of renewable generation and energy storage connected to the distribution system through an inverter. The implemented operation mode allows the virtual power plant to act as a single dispatchable generation unit. The case studies presented in the paper demonstrate that the model behaves according to the specified control algorithm and show how it can be incorporated into the solution scheme of a general parallel genetic algorithm in order to obtain the optimal day-ahead dispatch. Simulation results exhibit a clear benefit from the deployment of a virtual power plant when compared to distributed generation based only on renewable intermittent generation.Peer ReviewedPostprint (published version

Low Power system Design techniques for mobile computers

Portable products are being used increasingly. Because these systems are battery powered, reducing power consumption is vital. In this report we give the properties of low power design and techniques to exploit them on the architecture of the system. We focus on: min imizing capacitance, avoiding unnecessary and wasteful activity, and reducing voltage and frequency. We review energy reduction techniques in the architecture and design of a hand-held computer and the wireless communication system, including error control, sys tem decomposition, communication and MAC protocols, and low power short range net works

Design techniques for low-power systems

Portable products are being used increasingly. Because these systems are battery powered, reducing power consumption is vital. In this report we give the properties of low-power design and techniques to exploit them on the architecture of the system. We focus on: minimizing capacitance, avoiding unnecessary and wasteful activity, and reducing voltage and frequency. We review energy reduction techniques in the architecture and design of a hand-held computer and the wireless communication system including error control, system decomposition, communication and MAC protocols, and low-power short range networks

Multiple voltage scheme with frequency variation for power minimization of pipelined circuits at high-level synthesis

High-Level Synthesis (HLS) is defined as a translation process from a behavioral description into structural description. The high-level synthesis process consists of three interdependent phases: scheduling, allocation and binDing The order of the three phases varies depending on the design flow. There are three important quality measures used to support design decision, namely size, performance and power consumption. Recently, with the increase in portability, the power consumption has become a very dominant factor in the design of circuits. The aim of low-power high-level synthesis is to schedule operations to minimize switching activity and select low power modules while satisfying timing constraints. This thesis presents a heuristic that helps minimize power consumption by operating the functional units at multiple voltages and varied clock frequencies. The algorithm presented here deals with pipelined operations where multiple instance of the same operation are carried out. The algorithm was implemented using C++, on LINUX platform

Interfacing power electronics systems for smart grids: innovative perspectives of unified systems and operation modes

The power distribution grid is centrally managed concerning the requirements of the end-users, however, with the appearance of smart grids, new technologies arc arising. Therefore, distributed energy resources, mainly, renewables, energy storage systems, electric mobility, and power quality are viewed as encouraging contributions for improving power management. In these circumstances, this paper presents a power electronics perspective for the power distribution grid, considering innovative features, and including a power quality perception. Throughout the paper are presented relevant concepts for a concrete realization of a smart grid, supported by the integration of power electronics devices as the interface of the mentioned technologies. Aiming to support the innovative power electronics systems for interfacing the mentioned technologies in smart grids, a set of developed power electronics equipment was developed and, along with the paper, are shown and described, supporting the most important contributions of this paper.This work has been supported by FCT -Fundação para a Ciencia e Tecnologia within the R&D Units Project Scope: UIDB/00319/2020. This work has been supported by the FCT Project newERA4GRIDs PTDC/EEI-EEE/30283/2017