31 research outputs found

    Algorithm-circuit co-design for detecting symptomatic patterns in biological signals

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    The advancement in scaled Silicon technology has accelerated the development of a wide range of applications in various fields including medical technology. It has immensely contributed to finding solutions for monitoring general health as well as alleviating intractable disorders in the form of implantable and wearable systems. This necessitates the development of energy efficient and functionally efficacious systems. This thesis has explored the algorithm-circuit co-design approach for developing an energy efficient epileptic seizure detection processor which could be used for implantable epilepsy prosthesis. Novel wavelet transform based algorithms are proposed for accurate detection of epileptic seizures. Energy efficient techniques at circuit level such as power and clock gating are utilized along with error resiliency at algorithm level to implement these algorithms in TSMC 6565nm bulk-Si technology. Furthermore, the methodology is extended to develop a generic pattern detection system, which could be used for health monitoring. The wavelet transform along with mathematical metrics and Mel cepstrum are used to develop an algorithm which can detect generic patterns in biological audio signals. The application of algorithm-circuit co-design methodology helps in practically implementing this system into a low power design. Using approximation of coefficients and multiplier-less implementation, the Mel cepstrum algorithm is modified to optimize the hardware cost without losing its functional efficacy. The system is user-specific and scalable for detecting various patterns in biological signals. The methodologies mentioned in this thesis are intended towards development of user-scalable, energy efficient and highly efficacious systems for detection of patterns in variety of biological signals

    Optimized Biosignals Processing Algorithms for New Designs of Human Machine Interfaces on Parallel Ultra-Low Power Architectures

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    The aim of this dissertation is to explore Human Machine Interfaces (HMIs) in a variety of biomedical scenarios. The research addresses typical challenges in wearable and implantable devices for diagnostic, monitoring, and prosthetic purposes, suggesting a methodology for tailoring such applications to cutting edge embedded architectures. The main challenge is the enhancement of high-level applications, also introducing Machine Learning (ML) algorithms, using parallel programming and specialized hardware to improve the performance. The majority of these algorithms are computationally intensive, posing significant challenges for the deployment on embedded devices, which have several limitations in term of memory size, maximum operative frequency, and battery duration. The proposed solutions take advantage of a Parallel Ultra-Low Power (PULP) architecture, enhancing the elaboration on specific target architectures, heavily optimizing the execution, exploiting software and hardware resources. The thesis starts by describing a methodology that can be considered a guideline to efficiently implement algorithms on embedded architectures. This is followed by several case studies in the biomedical field, starting with the analysis of a Hand Gesture Recognition, based on the Hyperdimensional Computing algorithm, which allows performing a fast on-chip re-training, and a comparison with the state-of-the-art Support Vector Machine (SVM); then a Brain Machine Interface (BCI) to detect the respond of the brain to a visual stimulus follows in the manuscript. Furthermore, a seizure detection application is also presented, exploring different solutions for the dimensionality reduction of the input signals. The last part is dedicated to an exploration of typical modules for the development of optimized ECG-based applications

    Mixed-mode cellular array processor realization for analyzing brain electrical activity in epilepsy

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    This thesis deals with the realization of hardware that is capable of computing algorithms that can be described using the theory of polynomial cellular neural/nonlinear networks (CNNs). The goal is to meet the requirements of an algorithm for predicting the onset of an epileptic seizure. The analysis associated with this application requires extensive computation of data that consists of segments of brain electrical activity. Different types of computer architectures are overviewed. Since the algorithm requires operations in which data is manipulated locally, special emphasis is put on assessing different parallel architectures. An array computer is potentially able to perform local computational tasks effectively and rapidly. Based on the requirements of the algorithm, a mixed-mode CNN is proposed. A mixed-mode CNN combines analog and digital processing so that the couplings and the polynomial terms are implemented with analog blocks, whereas the integrator is digital. A/D and D/A converters are used to interface between the analog blocks and the integrator. Based on the mixed-mode CNN architecture a cellular array processor is realized. In the realized array processor the processing units are coupled with programmable polynomial (linear, quadratic and cubic) first neighborhood feedback terms. A 10 mm2, 1.027 million transistor cellular array processor, with 2×72 processing units and 36 layers of memory in each is manufactured using a 0.25 μm digital CMOS process. The array processor can perform gray-scale Heun's integration of spatial convolutions with linear, quadratic and cubic activation functions for 72×72 data while keeping all I/O operations during processing local. One complete Heun's iteration round takes 166.4 μs, while the power consumption during processing is 192 mW. Experimental results of statistical variations in the multipliers and polynomial circuits are shown. Descriptions regarding improvements in the design are also explained. The results of this thesis can be used to assess the suitability of the mixed-mode approach for implementing an implantable system for predicting epileptic seizures. The results can also be used to assess the suitability of the approach for implementing other applications.reviewe

    An Energy Efficient non-volatile FPGA Digital Processor for Brain Neuromodulation

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    PhD ThesisBrain stimulation technologies have the potential to provide considerable clinical benefits for people with a range of neurological disorders. Recent neuroscience studies have shown that considerable information of brain states is contained in the low frequency local field potential (If-LFP; below 5Hz) recordings with application in real-time closed-loop neurostimulation for treating neurological disorders. Given these signals can be sampled at low sampling rate and hence provide sparse data streams, there is an opportunity to design implantable neuroprosthesis with long battery lifecycles which enables enough processing power to implement long-term, real-time closed loop control algorithms. In this thesis, a closed-loop embedded digital processor has been created for use in rodent neuroscience experiments. The first contribution of this work is to develop a mathematical analytical design approach of feedback controller for suppressing high-amplitude epileptic activity in the neuron mass model to form a better understanding of how to perform a better closed-loop stimulation to control seizures. The second contribution and the third contribution are combined to present an exploratory energy-efficient digital processor architecture built with commercial off-the-shelf non-volatile FPGAs and microcontroller for sparse data processing of brain neuromodulation. A digital hardware design of an exemplar PID control algorithm has been implemented on this proposed digital architecture. A new power computing diagram of this time-driven approach significantly reduced the power consumption which suggests that a digital combined control system of non-volatile FPGAs and microcontroller outweighs a digital control system of microcontroller with microcontroller regarding computing time cost and energy consumption supposing one microcontroller is always required. Taken together, this digital energy-efficient processor architecture gives important insights and viewpoints for the further advancements of neuroprosthesis for brain neurostimulation to achieve lower power consumption for sparse sampling data rate

    Ultra low power wearable sleep diagnostic systems

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    Sleep disorders are studied using sleep study systems called Polysomnography that records several biophysical parameters during sleep. However, these are bulky and are typically located in a medical facility where patient monitoring is costly and quite inefficient. Home-based portable systems solve these problems to an extent but they record only a minimal number of channels due to limited battery life. To surmount this, wearable sleep system are desired which need to be unobtrusive and have long battery life. In this thesis, a novel sleep system architecture is presented that enables the design of an ultra low power sleep diagnostic system. This architecture is capable of extending the recording time to 120 hours in a wearable system which is an order of magnitude improvement over commercial wearable systems that record for about 12 hours. This architecture has in effect reduced the average power consumption of 5-6 mW per channel to less than 500 uW per channel. This has been achieved by eliminating sampled data architecture, reducing the wireless transmission rate and by moving the sleep scoring to the sensors. Further, ultra low power instrumentation amplifiers have been designed to operate in weak inversion region to support this architecture. A 40 dB chopper-stabilised low power instrumentation amplifiers to process EEG were designed and tested to operate from 1.0 V consuming just 3.1 uW for peak mode operation with DC servo loop. A 50 dB non-EEG amplifier continuous-time bandpass amplifier with a consumption of 400 nW was also fabricated and tested. Both the amplifiers achieved a high CMRR and impedance that are critical for wearable systems. Combining these amplifiers with the novel architecture enables the design of an ultra low power sleep recording system. This reduces the size of the battery required and hence enables a truly wearable system.Open Acces

    Wireless tools for neuromodulation

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    Epilepsy is a spectrum of diseases characterized by recurrent seizures. It is estimated that 50 million individuals worldwide are affected and 30% of cases are medically refractory or drug resistant. Vagus nerve stimulation (VNS) and deep brain stimulation (DBS) are the only FDA approved device based therapies. Neither therapy offers complete seizure freedom in a majority of users. Novel methodologies are needed to better understand mechanisms and chronic nature of epilepsy. Most tools for neuromodulation in rodents are tethered. The few wireless devices use batteries or are inductively powered. The tether restricts movement, limits behavioral tests, and increases the risk of infection. Batteries are large and heavy with a limited lifetime. Inductive powering suffers from rapid efficiency drops due to alignment mismatches and increased distances. Miniature wireless tools that offer behavioral freedom, data acquisition, and stimulation are needed. This dissertation presents a platform of electrical, optical and radiofrequency (RF) technologies for device based neuromodulation. The platform can be configured with features including: two channels differential recording, one channel electrical stimulation, and one channel optical stimulation. Typical device operation consumes less than 4 mW. The analog front end has a bandwidth of 0.7 Hz - 1 kHz and a gain of 60 dB, and the constant current driver provides biphasic electrical stimulation. For use with optogenetics, the deep brain optical stimulation module provides 27 mW/mm2 of blue light (473 nm) with 21.01 mA. Pairing of stimulating and recording technologies allows closed-loop operation. A wireless powering cage is designed using the resonantly coupled filter energy transfer (RCFET) methodology. RF energy is coupled through magnetic resonance. The cage has a PTE ranging from 1.8-6.28% for a volume of 11 x 11 x 11 in3. This is sufficient to chronically house subjects. The technologies are validated through various in vivo preparations. The tools are designed to study epilepsy, SUDEP, and urinary incontinence but can be configured for other studies. The broad application of these technologies can enable the scientific community to better study chronic diseases and closed-loop therapies

    Nano-Watt Modular Integrated Circuits for Wireless Neural Interface.

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    In this work, a nano-watt modular neural interface circuit is proposed for ECoG neuroprosthetics. The main purposes of this work are threefold: (1) optimizing the power-performance of the neural interface circuits based on ECoG signal characteristics, (2) equipping a stimulation capability, and (3) providing a modular system solution to expand functionality. To achieve these aims, the proposed system introduces the following contributions/innovations: (1) power-noise optimization based on the ECoG signal driven analysis, (2) extreme low-power analog front-ends, (3) Manchester clock-edge modulation clock data recovery, (4) power-efficient data compression, (5) integrated stimulator with fully programmable waveform, (6) wireless signal transmission through skin, and (7) modular expandable design. Towards these challenges and contributions, three different ECoG neural interface systems, ENI-1, ENI-16, and ENI-32, have been designed, fabricated, and tested. The first ENI system(ENI-1) is a one-channel analog front-end and fabricated in a 0.25µm CMOS process with chopper stabilized pseudo open-loop preamplifier and area-efficient SAR ADC. The measured channel power, noise and area are 1.68µW at 2.5V power-supply, 1.69µVrms (NEF=2.43), and 0.0694mm^2, respectively. The fabricated IC is packaged with customized miniaturized package. In-vivo human EEG is successfully measured with the fabricated ENI-1-IC. To demonstrate a system expandability and wireless link, ENI-16 IC is fabricated in 0.25µm CMOS process and has sixteen channels with a push-pull preamplifier, asynchronous SAR ADC, and intra-skin communication(ISCOM) which is a new way of transmitting the signal through skin. The measured channel power, noise and area are 780nW, 4.26µVrms (NEF=5.2), and 2.88mm^2, respectively. With the fabricated ENI-16-IC, in-vivo epidural ECoG from monkey is successfully measured. As a closed-loop system, ENI-32 focuses on optimizing the power performance based on a bio-signal property and integrating stimulator. ENI-32 is fabricated in 0.18µm CMOS process and has thirty-two recording channels and four stimulation channels with a cyclic preamplifier, data compression, asymmetric wireless transceiver (Tx/Rx). The measured channel power, noise and area are 140nW (680nW including ISCOM), 3.26µVrms (NEF=1.6), and 5.76mm^2, respectively. The ENI-32 achieves an order of magnitude power reduction while maintaining the system performance. The proposed nano-watt ENI-32 can be the first practical wireless closed-loop solution with a practically miniaturized implantable device.PhDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/98064/1/schang_1.pd

    Pattern Recognition

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    Pattern recognition is a very wide research field. It involves factors as diverse as sensors, feature extraction, pattern classification, decision fusion, applications and others. The signals processed are commonly one, two or three dimensional, the processing is done in real- time or takes hours and days, some systems look for one narrow object class, others search huge databases for entries with at least a small amount of similarity. No single person can claim expertise across the whole field, which develops rapidly, updates its paradigms and comprehends several philosophical approaches. This book reflects this diversity by presenting a selection of recent developments within the area of pattern recognition and related fields. It covers theoretical advances in classification and feature extraction as well as application-oriented works. Authors of these 25 works present and advocate recent achievements of their research related to the field of pattern recognition
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