Information Power Efficiency Tradeoffs in Mixed Signal CMOS Circuits

Increasingly sensors for biological applications are implemented using mixed signal CMOS technologies. As feature sizes in modern technologies decrease with each generation, the power supply voltage also decreases, but the intrinsic noise level increases or remains the same. The performance of any sensor is quantified by the weakest detectable signal, and noise limits the ability of a sensor to detect the signal. In order to explore the trade-offs among incoming signal, the intrinsic physical noise of the circuit, and the available power resources, we apply basic concepts from information theory to CMOS circuits. In this work the circuits are modeled as communication channels with additive colored Gaussian noise and the signal transfer characteristics and noise properties are used to determine the classical Shannon capacity of the system. The waterfilling algorithm is applied to these circuits to obtain the information rate and the bit energy is subsequently calculated. In this dissertation we restricted our attention to operational transconductance amplifiers, a basic building block for many circuits and sensors and oftentimes a major source of noise in a sensor system. It is shown that for typical amplifiers the maximum information rate occurs at bandwidths above the dominant pole of the amplifier where the intrinsic physical circuit noise is diminished, but at the same time the output signal is attenuated. Thus these techniques suggest a methodology for the optimal use of the amplifier, but in many cases it is not practical to use an amplifier in this manner, that is at frequencies above its 3dB cutoff. Further, a direct consequence of applying the classic waterfilling algorithm leads to the idea of using modulation techniques to optimize system performance by shifting signals internally to higher frequencies, providing a practical means to achieve the information rates predicted by waterfilling and at the same time maintaining the real world application of these amplifiers. In addition, the information rates and bit energy for basic CMOS amplifier configurations are studied and compared across configurations and processes. Further the additional design constraints formed by adding the information rate and the bit energy to traditional design characteristics is explored

CMOS SINGLE-PHOTON AVALANCHE DIODES AND MICROMACHINED OPTICAL FILTERS FOR INTEGRATED FLUORESCENCE SENSING

This dissertation presents a body of work that addresses the two most pressing challenges in the field of integrated fluorescence sensing, namely, the design of integrated optical sensors and the fabrication of high-rejection micro-scale optical filters. Two novel enabling technologies were introduced. They are: the perimeter-gated single-photon avalanche diode (PGSPAD), for on-chip photon counting, and the benzotriazole (BTA)-doped thin-film polymer filter, for on-chip ultraviolet light rejection. Experimental results revealed that the PGSPAD front-end, fabricated in a 0.5 μm standard mixed-signal CMOS process, had the capability of counting photons in the MHz regime. In addition, it was found that a perimeter gate, a structural feature used to suppress edge breakdown in the diode, also maximized the signal-to-noise-ratio in the high-count rate regime whereas it maximized sensitivity at low count rates. On the other hand, BTA-doped filters were demonstrated utilizing three commonly used polymers as hosts. The filters were patternable, utilizing the same procedures traditionally used to pattern the undoped polymer hosts, a key advantage for integration into microsystems. Filter performance was analyzed using a set of metrics developed for optoelectronic characterization of integrated fluorescence sensors; high rejection levels (nearing -40 dB) of UV light were observed in films of only 5 μm in thickness. Ultimately, BTA-doped filters were integrated into a portable sensor, and their use was demonstrated in two types of bioassays