3 research outputs found

    Dominant Feature Pooling for Multi Camera Object Detection and Optimization of Retinex Algorithm

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    ํ•™์œ„๋…ผ๋ฌธ(๋ฐ•์‚ฌ) -- ์„œ์šธ๋Œ€ํ•™๊ต๋Œ€ํ•™์› : ๊ณต๊ณผ๋Œ€ํ•™ ์ „๊ธฐยท์ •๋ณด๊ณตํ•™๋ถ€, 2021.8. ์ดํ˜์žฌ.๋ณธ ๋…ผ๋ฌธ์€ ๋ฉ€ํ‹ฐ ์นด๋ฉ”๋ผ object detection CNN์„ ์œ„ํ•œ detection ๋‹จ๊ณ„์—์„œ ํ™œ์šฉํ•˜๋Š” ์ƒˆ๋กœ์šด dominant feature pooling ๋ฐฉ๋ฒ•์„ ์ œ์•ˆํ•œ๋‹ค. ๋ฉ€ํ‹ฐ ์นด๋ฉ”๋ผ ์‹œ์Šคํ…œ์€ ๋‹ค์–‘ํ•œ ๊ด€์ ์—์„œ ๋ฌผ์ฒด์˜ ์ด๋ฏธ์ง€๋ฅผ ์บก์ฒ˜ํ•˜๊ณ , ๋ฌผ์ฒด์˜ ๋” ๋งŽ์€ ์ฃผ์š” feature๋ฅผ detection์— ํ™œ์šฉํ•  ์ˆ˜ ์žˆ๋‹ค. ๋”ฐ๋ผ์„œ ์—ฌ๋Ÿฌ ์นด๋ฉ”๋ผ์—์„œ feature๋ฅผ poolingํ•˜๋ฉด detection ์ •ํ™•๋„๋ฅผ ํ–ฅ์ƒ์‹œํ‚ฌ ์ˆ˜ ์žˆ๋‹ค. ์ œ์•ˆ๋œ ๋ฐฉ๋ฒ•์€ ๊ฐ์ฒด์˜ ๋‹ค์–‘ํ•œ ๋ทฐํฌ์ธํŠธ์—์„œ ์–ป์€ feature vector ์ค‘์—์„œ ๋” ๋งŽ์€ ์ •๋ณด๋ฅผ ์ œ๊ณตํ•˜๋Š” ์ฃผ์š” feature์„ ์„ ํƒํ•˜๊ณ  ์„ ํƒํ•œ feature vector๋ฅผ poolingํ•˜์—ฌ ์ƒˆ๋กœ์šด feature map์„ ๊ตฌ์„ฑํ•œ๋‹ค. ์ œ์•ˆ๋œ ๋ฐฉ๋ฒ•์€ ๋‹จ์ผ ์นด๋ฉ”๋ผ์— ๋Œ€ํ•œ YOLOv3 ๋„คํŠธ์›Œํฌ๋ฅผ ๊ธฐ๋ฐ˜์œผ๋กœ ํ•˜๋ฉฐ, ๋ฉ€ํ‹ฐ ์นด๋ฉ”๋ผ ์‹œ์Šคํ…œ์— ๋Œ€ํ•œ ์ถ”๊ฐ€ ํ•™์Šต ๊ณผ์ •์ด ํ•„์š”ํ•˜์ง€ ์•Š๋‹ค. Dominant feature pooling์˜ ํšจ๊ณผ๋ฅผ ์ฃผ์žฅํ•˜๊ธฐ ์œ„ํ•ด, ์ด ์—ฐ๊ตฌ์—์„œ๋Š” feature vector๋ฅผ ์‹œ๊ฐํ™”ํ•˜๋Š” ์ƒˆ๋กœ์šด ๋ฐฉ๋ฒ•๋„ ์ œ์•ˆ๋œ๋‹ค. ๋˜ํ•œ object detection CNN์€ ์ €์กฐ๋„ ํ™˜๊ฒฝ์— ๋Œ€์‘์ด ์ทจ์•ฝํ•˜๋ฏ€๋กœ ์ด๋ฅผ ๊ฐœ์„ ํ•  ์ˆ˜ ์žˆ๋Š” Retinex ์•Œ๊ณ ๋ฆฌ์ฆ˜์˜ ํ™œ์šฉ ๋ฐฉ๋ฒ•์„ ์ œ์•ˆํ•œ๋‹ค. ์ €์กฐ๋„ ์˜์ƒ์„ ๊ทธ๋Œ€๋กœ ํ•™์Šตํ•˜์—ฌ ๊ฐœ์„ ์„ ํ•  ์ˆ˜ ์žˆ์ง€๋งŒ, ์‹ค ์‚ฌ์šฉ ํ™˜๊ฒฝ์—์„œ ์กฐ๋„ ์ •๋„๋ฅผ ์˜ˆ์ธกํ•  ์ˆ˜ ์—†๊ธฐ ๋•Œ๋ฌธ์— Retinex ๊ฐœ์„ ์ด ํ•„์ˆ˜์ ์ž„์„ ์‹คํ—˜์„ ํ†ตํ•ด ๋‚˜ํƒ€๋‚ด์—ˆ๋‹ค. ๋˜ํ•œ ๊ฐœ์„  ํšจ๊ณผ๊ฐ€ ๋šœ๋ ทํ•˜์ง€๋งŒ ๋ณต์žก๋„๊ฐ€ ๋†’์€ Retinex ์•Œ๊ณ ๋ฆฌ์ฆ˜์„ HW ์„ค๊ณ„๋ฅผ ํ†ตํ•ด ์ตœ์ ํ™” ํ•˜๋Š” ๋ฐฉ๋ฒ•์„ ์ œ์•ˆํ•œ๋‹ค. Retinex ์•Œ๊ณ ๋ฆฌ์ฆ˜ ์—ฐ์‚ฐ์— ํ•„์ˆ˜์ ์ธ exponentiation๊ณผ Gaussian filtering์„ ํšจ์œจ์ ์œผ๋กœ ๊ตฌํ˜„ํ•˜๋Š” ๋ฐฉ๋ฒ•์„ ์ œ์•ˆํ•˜์—ฌ ๋†’์€ ํ•ด์ƒ๋„์—์„œ๋„ ์‹ค์‹œ๊ฐ„์œผ๋กœ ๋™์ž‘์ด ๊ฐ€๋Šฅํ•œ HW๋ฅผ ๊ตฌํ˜„ํ•˜์˜€๋‹ค.This paper proposes a novel dominant feature pooling method utilized in the detection phase for multi-camera object detection CNNs. Multi-camera systems can capture images of objects from various perspectives and utilize more of the important features of objects for detection. Thus, the detection accuracy can be improved by pooling the features of the multiple cameras. The proposed method constructs a new feature patch by selecting and pooling the dominant features that provides more information among the feature vectors obtained from various viewpoints of objects. The proposed method is based on the YOLOv3 network for a single camera, and does not require additional learning processes for multi-camera systems. To show the effectiveness of dominant feature pooling, a novel method of visualizing feature vectors is also proposed in this work. Furthermore, a method of utilizing Retinex algorithms that can improve response to low-light environments for object detection CNN is proposed. Although improvements can be made by learning low-light images as they are, experimental results show that Retinex improvements are essential because the degree of illumination cannot be predicted accurately to create new datasets in practical environments. This work proposes a method to optimize Retinex algorithms through HW designs. An efficient implementation of the exponentiation operation and the Gaussian filtering, which are essential for Retinex algorithm operations is proposed to implement HW that can operate in real time at high resolution.์ œ 1 ์žฅ ์„œ ๋ก  1 1.1 ์—ฐ๊ตฌ ๋ฐฐ๊ฒฝ 1 1.2 ์—ฐ๊ตฌ ๋‚ด์šฉ 2 1.3 ๋…ผ๋ฌธ ๊ตฌ์„ฑ 4 ์ œ 2 ์žฅ ๋ฐฐ๊ฒฝ ์ด๋ก  ๋ฐ ๊ด€๋ จ ์—ฐ๊ตฌ 5 2.1 Object Detection CNN 5 2.2 Multi View CNN 6 2.3 Retinex ์•Œ๊ณ ๋ฆฌ์ฆ˜ 7 2.3.1 Retinex Algorithm using Gaussian Filter 8 2.3.2 Multiscale Retinex Algorithm 9 2.3.3 Efficient Naturalness Restoration 10 ์ œ 3 ์žฅ ๋ฌด์ธ ํŒ๋งค๋Œ€ ์‹œ์Šคํ…œ 12 3.1 ๋ฌด์ธ ํŒ๋งค๋Œ€ ์‹œ์Šคํ…œ ๊ฐœ์š” 12 3.2 Object Detection CNN์„ ํ™œ์šฉํ•œ ์ƒํ’ˆ ์ธ์‹ 16 3.3 Multi-Object Tracking์„ ํ™œ์šฉํ•œ ์ƒํ’ˆ ๊ตฌ๋งค ํŒ๋‹จ 18 3.4 ๋ฌด์ธ ํŒ๋งค๋Œ€์˜ ์‹ค์‹œ๊ฐ„ ๋™์ž‘์„ ์œ„ํ•œ ์ตœ์ ํ™” ๋ฐฉ์•ˆ 20 3.4.1 ์นด๋ฉ”๋ผ ์„ ํƒ ์•Œ๊ณ ๋ฆฌ์ฆ˜ 20 3.4.2 Multithreading 24 3.4.3 Pruning 25 3.5 ๋ฌด์ธ ํŒ๋งค๋Œ€ ์‹œ์Šคํ…œ ์„ฑ๋Šฅ ํ‰๊ฐ€ 27 3.5.1 Object Detection ์„ฑ๋Šฅ ํ‰๊ฐ€ 27 3.5.2 ๋ฌด์ธ ํŒ๋งค๋Œ€ ์‹œ์Šคํ…œ ์ „์ฒด ๊ฒฐ๊ณผ 29 ์ œ 4 ์žฅ ๋ฉ€ํ‹ฐ ์นด๋ฉ”๋ผ Dominant Feature Pooling 32 4.1 Object Detection CNN๊ณผ ๋ฉ€ํ‹ฐ ์นด๋ฉ”๋ผ Object Clustering 33 4.1.1 Object Detection CNN 33 4.1.2 ๋ฉ€ํ‹ฐ ์นด๋ฉ”๋ผ Object Clustring 35 4.2 Dominant Feature Pooling ๋ฐฉ๋ฒ• 37 4.2.1 Dominant Feature Scoring 40 4.2.2 Dominant Feature Pooling 47 4.2.3 YOLOv3์˜ Detection Layer ์žฌ์‚ฌ์šฉ 50 4.3 Feature ์‹œ๊ฐํ™”๋ฅผ ํ†ตํ•œ ์ œ์•ˆ ๋ฐฉ๋ฒ• ๋ถ„์„ 52 4.3.1 ์ œ์•ˆํ•˜๋Š” Feature ์‹œ๊ฐํ™” ๋ฐฉ๋ฒ• 52 4.3.2 ๊ธฐ์กด ๋‹จ์ผ ์นด๋ฉ”๋ผ YOLOv3์˜ Feature ์‹œ๊ฐํ™” 55 4.3.3 ์ œ์•ˆํ•˜๋Š” ๋ฐฉ๋ฒ•์˜ ๋ฉ€ํ‹ฐ์นด๋ฉ”๋ผ Feature ์‹œ๊ฐํ™” 57 4.4 Dominant Feature Pooling ๊ฒฐ๊ณผ ๋ฐ ๋ถ„์„ 59 4.4.1 COCO Dataset์—์„œ์˜ ๊ฒฐ๊ณผ 60 4.4.2 Custom Dataset์—์„œ์˜ ๊ฒฐ๊ณผ 62 4.4.3 Scoring Method ๋ณ„ ๊ฒฐ๊ณผ 63 4.4.3 Dominant Feature Pooling์˜ ์ˆ˜ํ–‰์‹œ๊ฐ„ ๊ฒฐ๊ณผ 64 ์ œ 5 ์žฅ Retinex Applied Object Detection ๋ฐ ํ•˜๋“œ์›จ์„œ ๊ฐ€์†์‹œ์Šคํ…œ 65 5.1 ๊ธฐ์กด Retinex ์ ์šฉ ์—ฐ๊ตฌ 66 5.2 Retinex Applied Object Detection 68 5.2.1 Retinex Applied Object Detection ํ•™์Šต 68 5.2.2 Retinex Applied Object Detection ๊ฒฐ๊ณผ 72 5.3 Object Detection์„ ์œ„ํ•œ Retinex ์ตœ์ ํ™” 76 5.3.1 Gaussian Filter ํฌ๊ธฐ์— ๋”ฐ๋ฅธ Retinex ํšจ๊ณผ ๋ถ„์„ 76 5.3.2 Gaussain Filter ํฌ๊ธฐ์— ๋”ฐ๋ฅธ Object Detection ๊ฒฐ๊ณผ 80 5.4 Retinex ํ•˜๋“œ์›จ์–ด ์‹œ์Šคํ…œ์˜ ํ•„์š”์„ฑ ๋ฐ ๊ธฐ์กด ์—ฐ๊ตฌ 82 5.5 ์ œ์•ˆ ํ•˜๋“œ์›จ์–ด ์‹œ์Šคํ…œ ๊ตฌํ˜„ ๊ฐœ์š” 85 5.6 ์ œ์•ˆ ํ•˜๋“œ์›จ์–ด ์‹œ์Šคํ…œ ๊ตฌํ˜„ ํŠน์žฅ์  89 5.6.1 Gaussian filter์˜ ๊ตฌํ˜„ 89 5.6.2 Exponentiation์˜ ๊ตฌํ˜„ 96 5.6.3 HDMI/DVI ์ง€์› ๋ฐ ์˜์ƒ latency ์ตœ์†Œํ™” 103 5.7 ์ œ์•ˆ ํ•˜๋“œ์›จ์–ด ์‹œ์Šคํ…œ ๊ตฌํ˜„ ๊ฒฐ๊ณผ ๋ฐ ๋ถ„์„ 106 5.7.1 ์‹ค์‹œ๊ฐ„ ๋™์ž‘ ๋ฐ ๋‚ฎ์€ latency์— ๋Œ€ํ•œ ๋ถ„์„ 106 5.7.2 ์ œ์•ˆํ•œ ์‹œ์Šคํ…œ์˜ ์˜์ƒ ์ฒ˜๋ฆฌ ์„ฑ๋Šฅ ๊ฒฐ๊ณผ ๋ถ„์„ 109 5.7.3 ์ œ์•ˆํ•œ ์‹œ์Šคํ…œ์˜ FPGA Resource Utilization 112 5.7.4 ๋‹ค๋ฅธ ์‹œ์Šคํ…œ๊ณผ์˜ Resource Utilization ๋น„๊ต 114 5.7.5 ์ œ์•ˆํ•œ ์‹œ์Šคํ…œ์˜ ์˜์ƒ ์ฒ˜๋ฆฌ ์„ฑ๋Šฅ ๊ฒฐ๊ณผ ๋ถ„์„ 119 ์ œ 6 ์žฅ ๊ฒฐ๋ก  120 ์ฐธ๊ณ ๋ฌธํ—Œ 121 Abstract 131๋ฐ•

    A flexible FPGA implementation for illuminanceโ€“reflectance video enhancement

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    2Abstract: Digital cameras, new generation phones, commercial TV sets and, in general, all modern devices for image acquisition and visualization can benefit from algorithms for image enhancement suitable to work in real time and preferably with limited power consumption. Among the various methods described in the scientific literature, Retinex-based approaches are able to provide very good performances, but unfortunately they typically require a high computational effort. In this article, we propose a flexible and effective architecture for the real-time enhancement of video frames, suitable to be implemented in a single FPGA device. The video enhancement algorithm is based on a modified version of the Retinex approach. This method, developed to control the dynamic range of poorly illuminated images while preserving the visual details, has been improved by the adoption of a new model to perform illuminance estimation. The video enhancement parameters are controlled in real time through an embedded microprocessor which makes the system able to modify its behavior according to the characteristics of the input images, and using information about the surrounding light conditions.nonemixedMarsi S.;Ramponi G.Marsi, Stefano; Ramponi, Giovann

    Towards the development of flexible, reliable, reconfigurable, and high-performance imaging systems

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    Current FPGAs can implement large systems because of the high density of reconfigurable logic resources in a single chip. FPGAs are comprehensive devices that combine flexibility and high performance in the same platform compared to other platform such as General-Purpose Processors (GPPs) and Application Specific Integrated Circuits (ASICs). The flexibility of modern FPGAs is further enhanced by introducing Dynamic Partial Reconfiguration (DPR) feature, which allows for changing the functionality of part of the system while other parts are functioning. FPGAs became an important platform for digital image processing applications because of the aforementioned features. They can fulfil the need of efficient and flexible platforms that execute imaging tasks efficiently as well as the reliably with low power, high performance and high flexibility. The use of FPGAs as accelerators for image processing outperforms most of the current solutions. Current FPGA solutions can to load part of the imaging application that needs high computational power on dedicated reconfigurable hardware accelerators while other parts are working on the traditional solution to increase the system performance. Moreover, the use of the DPR feature enhances the flexibility of image processing further by swapping accelerators in and out at run-time. The use of fault mitigation techniques in FPGAs enables imaging applications to operate in harsh environments following the fact that FPGAs are sensitive to radiation and extreme conditions. The aim of this thesis is to present a platform for efficient implementations of imaging tasks. The research uses FPGAs as the key component of this platform and uses the concept of DPR to increase the performance, flexibility, to reduce the power dissipation and to expand the cycle of possible imaging applications. In this context, it proposes the use of FPGAs to accelerate the Image Processing Pipeline (IPP) stages, the core part of most imaging devices. The thesis has a number of novel concepts. The first novel concept is the use of FPGA hardware environment and DPR feature to increase the parallelism and achieve high flexibility. The concept also increases the performance and reduces the power consumption and area utilisation. Based on this concept, the following implementations are presented in this thesis: An implementation of Adams Hamilton Demosaicing algorithm for camera colour interpolation, which exploits the FPGA parallelism to outperform other equivalents. In addition, an implementation of Automatic White Balance (AWB), another IPP stage that employs DPR feature to prove the mentioned novelty aspects. Another novel concept in this thesis is presented in chapter 6, which uses DPR feature to develop a novel flexible imaging system that requires less logic and can be implemented in small FPGAs. The system can be employed as a template for any imaging application with no limitation. Moreover, discussed in this thesis is a novel reliable version of the imaging system that adopts novel techniques including scrubbing, Built-In Self Test (BIST), and Triple Modular Redundancy (TMR) to detect and correct errors using the Internal Configuration Access Port (ICAP) primitive. These techniques exploit the datapath-based nature of the implemented imaging system to improve the system's overall reliability. The thesis presents a proposal for integrating the imaging system with the Robust Reliable Reconfigurable Real-Time Heterogeneous Operating System (R4THOS) to get the best out of the system. The proposal shows the suitability of the proposed DPR imaging system to be used as part of the core system of autonomous cars because of its unbounded flexibility. These novel works are presented in a number of publications as shown in section 1.3 later in this thesis
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