Design and Implementation of Lightweight Certificateless Secure Communication Scheme on Industrial NFV-Based IPv6 Virtual Networks

With the fast growth of the Industrial Internet of Everything (IIoE), computing and telecommunication industries all over the world are moving rapidly towards the IPv6 address architecture, which supports virtualization architectures such as Network Function Virtualization (NFV). NFV provides networking services like routing, security, storage, etc., through software-based virtual machines. As a result, NFV reduces equipment costs. Due to the increase in applications on Industrial Internet of Things (IoT)-based networks, security threats have also increased. The communication links between people and people or from one machine to another machine are insecure. Usually, critical data are exchanged over the IoE, so authentication and confidentiality are significant concerns. Asymmetric key cryptosystems increase computation and communication overheads. This paper proposes a lightweight and certificateless end-to-end secure communication scheme to provide security services against replay attacks, man-in-the-middle (MITM) attacks, and impersonation attacks with low computation and communication overheads. The system is implemented on Linux-based Lubuntu 20.04 virtual machines using Java programming connected to NFV-based large-scale hybrid IPv4-IPv6 virtual networks. Finally, we compare the performance of our proposed security scheme with existing schemes based on the computation and communication costs. In addition, we measure and analyze the performance of our proposed secure communication scheme over NFV-based virtualized networks with regard to several parameters like end-to-end delay and packet loss. The results of our comparison with existing security schemes show that our proposed security scheme reduces the computation cost by 38.87% and the communication cost by 26.08%

Dracon: An Open-Hardware Based Platform for Single-Chip Low-Cost Reconfigurable IoT Devices

The development of devices for the Internet of Things (IoT) requires the rapid prototyping of different hardware configurations. In this paper, a modular hardware platform allowing to prototype, test and even implement IoT appliances on low-cost reconfigurable devices is presented. The proposed platform, named Dracon, includes a Z80-clone microprocessor, up to 64 KB of RAM, and 256 inputs/outputs (I/Os). These I/Os can be used to connect additional co-processors within the same FPGA, external co-processors, communications modules, sensors and actuators. Dracon also includes as default peripherals a UART for programming and accessing the microprocessor, a Real Time Clock, and an Interrupt Timer. The use of an 8-bit microprocessor allows the use of the internal memory of the reconfigurable device as program memory, thereby, enabling the implementation of a complete IoT device within a single low-cost chip. Indeed, results using a Spartan 7 FPGA show that it is possible to implement Dracon with only 1515 6-input LUTs while operating at a maximum frequency of 80 MHz, which results in a better trade-off in terms of area and performance than other less powerful and less versatile alternatives in the literature. Moreover, the presented platform allows the development of embedded software applications independently of the selected FPGA device, enabling rapid prototyping and implementations on devices from different manufacturers.Junta de AndaluciaEuropean Commission B-TIC-588-UGR2

Symmetric Encryption Algorithms: Review and Evaluation Study

The increased exchange of data over the Internet in the past two decades has brought data security and confidentiality to the fore front. Information security can be achieved by implementing encryption and decryption algorithms to ensure data remains secure and confidential, especially when transmitted over an insecure communication channel. Encryption is the method of coding information to prevent unauthorized access and ensure data integrity and confidentiality, whereas the reverse process is known as decryption. All encryption algorithms aim to secure data, however, their performance varies according to several factors such as file size, type, complexity, and platform used. Furthermore, while some encryption algorithms outperform others, they have been proven to be vulnerable against certain attacks. In this paper, we present a general overview of common encryption algorithms   and explain their inner workings. Additionally, we select ten different symmetric encryption algorithms and conduct a simulation in Java to test their performance. The algorithms we compare are: AES, BLOWFISH, RC2, RC4, RC6, DES, DESede, SEED, XTEA, and IDEA. We present the results of our simulation in terms of encryption speed, throughput, and CPU utilization rate for various file sizes ranging from 1MB to 1GB. We further analyze our results for all measures that have been tested, taking into account the level of security they provide

Performance Evaluation of Multimedia Transmission over Error-Prone Wireless Channel Using Block and Stream Ciphers.

Network security is one of the crucial topics discussed nowadays, as the world is emerging towards new systems and technologies such as Artificial Intelligence (AI), blockchain, and Internet of Things (IoT). Cryptography plays an important role in managing and providing security services to the information stored and exchanged over the digital network. Cryptographic algorithms are integrated in many of our daily life systems and applications such as: smart cards, electronic devices, mobile applications, and many social media platforms. Therefore, it is important to study the features of the existing cryptographic algorithms to find trends between stream ciphers and block ciphers. Since block ciphers operate at a fixed block size, it is very difficult to apply them in applications that require transmission of large amount of data over error-prone channels. In addition, the avalanche property in block ciphers cause error propagation from a single bit error, resulting in significant corruption to the whole data block. Therefore, cipher block modes of operation are used with the symmetric block ciphers to generate larger stream of input and providing security at the bit level to protect large data from error propagation. In this project, two simulations are conducted to evaluate block and stream ciphers over an error-prone wireless channel in terms of image error rate and time complexity. The first simulation compares the performance of the Rivest (RC4) stream cipher with the following block ciphers: Data Encryption Standard (DES), 3DES and Advanced Encryption Standard (AES). The second simulation examines how the following modes of operation: Cipher Block Chaining (CBC), Cipher Feed-Back (CFB) and Counter (CTR) applied to the AES would enhance the performance of AES compared to RC4. The results show a trade-off in the performance of the algorithms in terms of speed, security, and resistant to channel errors. Stream ciphers are faster and more efficient at localizing errors at a bit level, yet block ciphers are more secure. However, using the modes of operation with AES, the AES-CTR cipher was able to eliminate error propagation more than RC4. In terms of speed, the AES-CTR processed the data with less time compared to AES, but it required more time than RC4