6 research outputs found
Compact Floor-Planning via Orderly Spanning Trees
Floor-planning is a fundamental step in VLSI chip design. Based upon the
concept of orderly spanning trees, we present a simple O(n)-time algorithm to
construct a floor-plan for any n-node plane triangulation. In comparison with
previous floor-planning algorithms in the literature, our solution is not only
simpler in the algorithm itself, but also produces floor-plans which require
fewer module types. An equally important aspect of our new algorithm lies in
its ability to fit the floor-plan area in a rectangle of size (n-1)x(2n+1)/3.
Lower bounds on the worst-case area for floor-planning any plane triangulation
are also provided in the paper.Comment: 13 pages, 5 figures, An early version of this work was presented at
9th International Symposium on Graph Drawing (GD 2001), Vienna, Austria,
September 2001. Accepted to Journal of Algorithms, 200
Rectangular Layouts and Contact Graphs
Contact graphs of isothetic rectangles unify many concepts from applications
including VLSI and architectural design, computational geometry, and GIS.
Minimizing the area of their corresponding {\em rectangular layouts} is a key
problem. We study the area-optimization problem and show that it is NP-hard to
find a minimum-area rectangular layout of a given contact graph. We present
O(n)-time algorithms that construct -area rectangular layouts for
general contact graphs and -area rectangular layouts for trees.
(For trees, this is an -approximation algorithm.) We also present an
infinite family of graphs (rsp., trees) that require (rsp.,
) area.
We derive these results by presenting a new characterization of graphs that
admit rectangular layouts using the related concept of {\em rectangular duals}.
A corollary to our results relates the class of graphs that admit rectangular
layouts to {\em rectangle of influence drawings}.Comment: 28 pages, 13 figures, 55 references, 1 appendi