6,337 research outputs found
Static Analysis of Run-Time Errors in Embedded Real-Time Parallel C Programs
We present a static analysis by Abstract Interpretation to check for run-time
errors in parallel and multi-threaded C programs. Following our work on
Astr\'ee, we focus on embedded critical programs without recursion nor dynamic
memory allocation, but extend the analysis to a static set of threads
communicating implicitly through a shared memory and explicitly using a finite
set of mutual exclusion locks, and scheduled according to a real-time
scheduling policy and fixed priorities. Our method is thread-modular. It is
based on a slightly modified non-parallel analysis that, when analyzing a
thread, applies and enriches an abstract set of thread interferences. An
iterator then re-analyzes each thread in turn until interferences stabilize. We
prove the soundness of our method with respect to the sequential consistency
semantics, but also with respect to a reasonable weakly consistent memory
semantics. We also show how to take into account mutual exclusion and thread
priorities through a partitioning over an abstraction of the scheduler state.
We present preliminary experimental results analyzing an industrial program
with our prototype, Th\'es\'ee, and demonstrate the scalability of our
approach
Timed Automata Semantics for Analyzing Creol
We give a real-time semantics for the concurrent, object-oriented modeling
language Creol, by mapping Creol processes to a network of timed automata. We
can use our semantics to verify real time properties of Creol objects, in
particular to see whether processes can be scheduled correctly and meet their
end-to-end deadlines. Real-time Creol can be useful for analyzing, for
instance, abstract models of multi-core embedded systems. We show how analysis
can be done in Uppaal.Comment: In Proceedings FOCLASA 2010, arXiv:1007.499
Scheduling and Allocation of Non-Manifest Loops on Hardware Graph-Models
We address the problem of scheduling non-manifest data dependant periodic loops for high throughput DSP-applications based on a streaming data model. In contrast to manifest loops, non-manifest data dependant loops are loops where the number of iterations needed in order to perform a calculation is data dependant and hence not known at compile time. For the case of manifest loops, static scheduling techniques have been devised which produce near optimal schedules. Due to the lack of exact run-time execution knowledge of non-manifest loops, these static scheduling techniques are not suitable for tackling scheduling problems of DSP-algorithms with non-manifest loops embedded in them. We consider the case where (a) a-priori knowledge of the data distribution, and (b) worst case execution time of the non-manifest loop are known and a constraint on the total execution time has been given. Under these conditions dynamic schedules of the non-manifest data dependant loops within the DSP-algorithm are possible. We show how to construct hardware which dynamically schedules these non-manifest loops. The sliding window execution, which is the execution of a non-manifest loop when the data streams through it, of the constructed hardware will guarantee real time performance for the worst case situation. This is the situation when each non-manifest loop requires its maximum number of iterations
Shawn: A new approach to simulating wireless sensor networks
We consider the simulation of wireless sensor networks (WSN) using a new
approach. We present Shawn, an open-source discrete-event simulator that has
considerable differences to all other existing simulators. Shawn is very
powerful in simulating large scale networks with an abstract point of view. It
is, to the best of our knowledge, the first simulator to support generic
high-level algorithms as well as distributed protocols on exactly the same
underlying networks.Comment: 10 pages, 2 figures, 2 tables, Latex, to appear in Design, Analysis,
and Simulation of Distributed Systems 200
Mechatronic Design: A Port-Based Approach
In this paper we consider the integrated design of a mechatronic system. After considering the different design steps it is shown that a port-based approach during all phases of the design supports a true mechatronic design philosophy. Port-based design enables use of consistent models of the system throughout the design process, multiple views in different domains and reusability of plant models, controller components and software processes. The ideas are illustrated with the conceptual and detailed design of a mobile robot
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The Early Assessment of System Performance in Distributed Real-time Systems
Distributed real-time process control systems are notoriously difficult to develop. They frequently overrun time schedules and break cost constraints. The problems are compounded where there are multiple development teams and stakeholders. Conventional model-driven development has been examined to see if it can be extended to resolve some of these problems. It may be possible to use early system design stages to identify performance issues which would otherwise not be identified until late in the development of the system. A functional model is proposed, in addition to those conventionally used for model-driven development, based on loosely coupled functional elements, to represent the behaviour of each system component. The model complements existing requirements and design specifications and addresses the combination of individual component abstractions to produce a complete system specification.
The functional model enables the accurate prediction of system performance prior to the detailed design of each component. The thesis examines how performance can be calculated and modelled. An animator tool and associated code generator are used to predict system and component performance in a distributed aircraft navigation system.
The use of the animator to support the system design prior to the generation of the component contract specifications and interface control documents provides a means of assessing performance which is accessible to domain experts and system designers alike. The model also enables the effects of requirements changes and component design issues on the system design to be assessed in terms of the system design to provide system wide solutions.
This performance assessment model and animator compliments the existing 'fix-it-later' approach, reducing the chances of performance failure detected late during the system development process when they are most expensive to fix
Assessment of Response Time for New Multi Level Feedback Queue Scheduler
Response time is one of the characteristics of scheduler, happens to be a
prominent attribute of any CPU scheduling algorithm. The proposed New Multi
Level Feedback Queue [NMLFQ] Scheduler is compared with dynamic, real time,
Dependent Activity Scheduling Algorithm (DASA) and Lockes Best Effort
Scheduling Algorithm (LBESA). We abbreviated beneficial result of NMLFQ
scheduler in comparison with dynamic best effort schedulers with respect to
response time.Comment: 7 pages, 5 figure
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