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3 research outputs found

Evaluating dynamic partial reconfiguration in the integer pipeline of a FPGA-based opensource processor

Author: Canagarajah CN
Nabina A
Nunez-Yanez JL
Zaidi SIH
Publication venue: 'Institute of Electrical and Electronics Engineers (IEEE)'
Publication date: 01/09/2008
Field of study

Explore Bristol Research

Power/area analysis of a FPGA-based open-source processor using partial dynamic reconfiguration

Author: Canagarajah CN
Nabina A
Nunez-Yanez JL
Zaidi SIH
Publication venue: 'Institute of Electrical and Electronics Engineers (IEEE)'
Publication date: 01/09/2008
Field of study

Explore Bristol Research

A self-reconfigurable system-on-chip architecture for satellite on-board computer maintenance

Author: Vladimirova T
Wu X
Publication venue: SPRINGER-VERLAG BERLIN
Publication date: 23/01/2020
Field of study

University of Surrey

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