A Re-engineering Approach to Low Power FPGA Design Using SPFD

In this paper, we present a method to re-synthesize Look-Up Table #LUT# based Field Programmable Gate Arrays #FPGAs# for lowpower design after technology mapping, placement and routing are performed. We use Set of Pairs of Functions to be Distinguished #SPFD# to express functional permissibility of each signal. Using di#erent propagations of SPFD to fan-in signals, we change the functionality of a PLB #Programmable Logic Block# which drives large loading into one with low transition density. Experimental results show that our method can reduce on average 12% power consumption compared to the original circuits without affecting placement and routing