A Temporal extension of Prolog

AbstractTemporal Prolog, a temporal logic extension of PROLOG, is presented. The primary criterion for the model selection has been its natural embedment into the logic programming paradigm. Under strong efficiency constraints, a first-order “reified” logic has been taken as a basis for the implementation. Allen's temporal constraint algorithm has been extended for treatment of retractable constraints. Their embedment into Temporal Prolog can be viewed as an instance of the Constraint Logic Programming paradigm. An example inspired by K. Forbus's Qualitative Process Theory illustrates how qualitative simulation and related tasks can be formulated in Temporal Prolog in a transparent and declarative way

Behavioural specification and simulation of minimum configuration computer systems.

The ultimate goal of Computer-Aided Design research in the area of digital circuits is the automatic synthesis of a complete solution from a behavioural specification. This thesis describes an attempt to attain this ideal in the more limited realm of designing single-board control systems, constructed from general-purpose microprocessor components. The difficulties currently encountered in designing and implementing microprocessor control systems are outlined, and the architecture of an integrated, knowledge-based design system is proposed as a method of overcoming these difficulties. The design system encompasses both behavioural and structural design functions. However, only the tools and techniques required to fulfil the behavioural design functions are considered in detail in this project.A review of previous work in the field of automated digital circuit design and software and hardware specification languages is presented. The major features of a novel language for specifying and simulating control system behaviour are then described, together with an intermediate design description notation, which facilitates the generation of microprocessor assembly language code directly from behavioural specifications. The design and implementation of a fast, generalised microprocessor simulation facility constructed from transputers is discussed, and its performance potential analysed. The simulation facility enables the complete design for a given application to be tested, before any actual hardware construction takes place. Finally, an evaluation of the behavioural specification, synthesis and simulation techniques developed in this project is presented, and the benefits perceived from adopting such techniques are summarised. Issues concerning the integration of these techniques with the knowledge-based structural design tools are also dealt with, and suggestions for further developments and enhancements are identified