A Programmable Memory Hierarchy for Prefetching Linked Data Structures

Prefetching is often used to overlap memory latency with computation for array-based applications. However, prefetching for pointerintensive applications remains a challenge because of the irregular memory access pattern and pointer-chasing problem. In this paper, we use a programmable processor, a prefetch engine (PFE), at each level of the memory hierarchy to cooperatively execute instructions that traverse a linked data structure. Cache blocks accessed by the processors at the L2 and memory levels are proactively pushed up to the CPU