Quasi-Self-Powered Piezo-Floating-Gate Sensing Technology for Continuous Monitoring of Large-Scale Bridges

Developing a practical framework for long-term structural health monitoring (SHM) of large structures, such as a suspension bridge, poses several major challenges. The next generation of bridge SHM technology needs to continuously monitor conditions and issue early warnings prior to costly repair or catastrophic failures. Additionally, the technology has to interpret effects of rare, high-impact events like earthquakes or hurricanes. The development of this technology has become an even higher priority due to the fact that many of the world's bridges are reaching the end of their designed service lives. Current battery-powered wireless SHM methods use periodic sampling with relatively long sleep-cycles to increase a sensor's operational life. However, long sleep-cycles make the technology vulnerable to missing or misinterpreting the effect of a rare event. To address these practical issues, we present a novel quasi-self-powered sensing solution for long-term and cost-effective monitoring of large-scale bridges. The approach we propose combines our previously reported and validated self-powered Piezo-Floating-Gate (PFG) sensor in conjunction with an ultra-low-power, long-range wireless interface. The physics behind the PFG's operation enable it to continuously capture and store local, cumulative information regarding dynamic loading conditions of the bridge in non-volatile memory. Using extensive numerical and laboratory studies, we demonstrate the capabilities of the PFG sensor for predicting structural conditions. We then present a system level design that adapts PFG sensing for SHM in bridges. A challenging aspect of SHM in large-scale bridges is the need for long-range wireless interrogation, as many portions of the structure are not easily accessible for continual inspection and portions of the bridge cannot be frequently taken out-of-service. We show that by combining self-powered PFG sensors with a small battery and optimized long-range active wireless interface, we can realize a quasi-self-powered system that easily achieves a continuous operating lifespan in excess of 20 years. The efficiency and feasibility of the proposed method is verified in a case study of the Mackinac Bridge in Michigan, the longest suspension bridge across anchorages in the Western Hemisphere. Associated data from the deployment are discussed, in addition to limitations, challenges, and additional considerations for widespread field deployment of the proposed SHM framework

Rail-to-Rail Operational in Low-Power Reconfigurable Analog Circuitry

Analog signal processing (ASP) can be used to decrease energy consumption by several orders of magnitude over completely digital applications. Low-power field programmable analog arrays (FPAA) have been previously used by analog designers to decrease energy consumption. Combining ASP with an FPAA, energy consumption of these systems can be further reduced. For ASP to be most functional, it must achieve rail-to-rail operation to maintain a high dynamic range. This work strives to further reduce power consumption in reconfigurable analog circuitry by presenting a novel data converter that utilizes ASP and rail-to-rail operation. Rail-to-Rail operation is achieved in the data converter with the use of an operational amplifier presented in this work. This efficient yet elementary data converter has been fabricated in a 0.5$\mu$m standard CMOS process. Additionally, this work looks deeper into the challenges of students working remotely, how MATLAB can be used to create circuit design tools, and how these developmental tools can be used by circuit design students

Precision rail-to-rail input-output operational amplifier using laser-trimmable poly-silicon resistors in standard cmos process

Motivation -- Objective -- Input offset voltage trimming methods for operational amplifiers -- Rail-to-rail input/output amplifiers -- Organization of the dissertation -- Design of a precision CMOS operational amplifier and PTAT bias generator -- Precision analog circuit design considerations -- CMOS rail-to-rail I/O operational amplifier design -- Effect of load resistor trimming on offset voltage -- CMOS PTAT bias circuit design -- IC layout implementation -- Simulation results and experimental verification -- Conclusion and future work