8 research outputs found
A Pascal Machine Architecture Implemented in Bristle Blocks, a Prototype Silicon Computer
This thesis presents the multi-chip design of an architecture which directly implements the
language Pascal. The design uses custom VLSl rather than standard chips in order to
increase speed and reduce the number of chips needed.
The integrated circuits comprising the architecture are designed using Bristle Blocks, a chip
design tool developed at Caltech by Dave Johannsen (6). Bristle Blocks is called a silicon
compiler because it will put together an entire integrated circuit from a high level description
of its function. Bristle Blocks can be used to design datapath processor chips, where
external microcode is used to control operations on data busses inside the chip.
The Pascal machine architecture presented here is based on the EM-1 instruction set
designed by Andrew Tannenbaum (11,13). The EM-1 instruction set is intended to allow
efficient compilation of stack-based, high level languages. Tannenbaum supplies static
frequency data which is used heavily in making design decisions in the Pascal machine
architecture.
VLSl design has several important differences from design using standard components. A
large amount of function can be placed on a single chip, e.g., approximately 30,000
transistors on the Intel 8086, but only a small number of pins are available for off-chip
communication (typically 64 or less). This requires designs to be highly modular. In the
NMOS technology used at Caltech, driving signals off-chip takes up to ten times the time and
energy of on-chip communication. This requires inter-chip communication to be limited as
much as possible. Finally, the large amount of computing power available in VLSl
encourages the use of concurrency to gain execution speed.
This thesis is structured as follows. The thesis begins with a section defining the principles
to be followed in designing the Pascal system architecture. Following that are sections
describing Bristle Blocks and the EM-1 architecture. Next, the overall architecture of the
Pascal machine is described, followed by sections detailing the system data busses, the
common elements in the processors which make up the system, and the processors
themselves. A conclusion section summarizes the work, provides a brief critique of Bristle
Blocks, and includes recommendations for further work. Finally, the appendices document
the Bristle Blocks datapath elements and the EM-1 instruction set
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Prototypes from standard user interface management systems
Oregon Speedcode Universe (OSU) is a software development system employing on-screen editing of standard graphical user interface objects, prototyping, program generation, and automatic analysis tools which are typically used to accelerate the production of running applications. A programmer uses OSU to design and implement all user interface objects such as menus, windows, dialogs, and icons. These objects are then incorporated into an application-specific sequence which mimics the application during program development, and performs the desired operations of the application during program execution. Experimental results suggest that the techniques employed by OSU can be used to develop 50-90% of an application without explicit programming yielding productivity improvements of 2-10 fold.Keywords: rapid prototyping, program generation, 4GL, software development, user interface management, software tools, programming-in-the-large, object-oriented design, direct manipulation, visual programming
Window management algorithms for an all points addressable display
Thesis (B.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1983.MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERINGBibliography: leaf [94].by John Will Webster III.B.S
Run-time diagnostics in programming languages with data-structuring facilities
Modern high level programming languages have been designed with the intention of providing the means of expressing the solution to a problem in the most natural way possible. This thesis is concerned with the correctness of such solutions.The reliability of programs is discussed and techniques for increasing the likelihood of producing a correct program are examined. In particular, the use of certain high level languages affording program control structures and data types that allow an easy and natural expression of a real problem is seen to be of paramount importance. It is argued that using such programming languages is severely hampered if, in the event of a program error, diagnostic information is not available in terms of the program structure and data.This thesis is concerned with the provision of run-time diagnostic facilities. In particular,, the provision of such diagnostics for the user of data structures is seen as a currently neglected area.The implementation of the programming language Pascal is described. Within this implementation, a unique interactive diagnostics system is built to allow the programmer complete diagnostic capabilities expressed in terms of the Pascal language. The main innovation provided is the ability to display the data structures built within a program in a manner in which the programmer views them. The reactions to this system are described and the extent to which it has achieved its aims discussed
ETAG, A Formal Model of Competence Knowledge for User Interface Design
Vliet, J.C. van [Promotor]Tauber, M.J. [Copromotor]Veer, G.C. van der [Copromotor