8 research outputs found
Mems Accelerometer Design
Tez (Yüksek Lisans) -- İstanbul Teknik Üniversitesi, Fen Bilimleri Enstitüsü, 2005Thesis (M.Sc.) -- İstanbul Technical University, Institute of Science and Technology, 2005Bu çalışmada, analog kapasitif MEMS ivme ölçer sisteminin teori, tasarım süreci ve analizi incelenmiş ve yüzey mikro makine tekniği olan MUMPS prosesi kullanılarak geniş ölçme dinamiğine sahip MEMS ivme ölçer sistemi gerçeklenmiştir. Mekanik sistemin optimizasyonu için Bölüm 2 ‘de elde edilen analitik modeller kullanılarak C++ programla dilinde MABEMS isimli görsel tabanlı bir program yazılmıştır. Mekanik sistemlerin sonlu eleman analizlerinde ticari bir yazılım olan ANSYS kullanılmıştır. Davranışsal seviyedeki simulasyonlar içinse sistemin MATLAB Simulink modeli oluşturulmuştur. Elektronik algılama kısmında, parazitik kapasitelerin etkisini azalttığı için yük kuvvetlendiricisi yapısı kullanılmıştır. İvme ölçerin Bölüm 3’te elde edilen matematik modeli, analog davranışsal modelleme kütüphanesi (ABM) kullanılarak PSPICE içerisinde gerçeklenmiş ve bu da elektronik algılama devresi ile mekanik elemanın aynı ortamda simulasyonuna olanak vermiştir. Geleneksel yöntemlerde, MEMS ivme ölçerler, ölçme dinamiği, bant genişliği ve lineerlik gibi performans ölçütlerinin iyileştirilmesi için geri beslemeli çevrimde çalıştırılır. Bu çalışmada, bu yönteme alternatif olarak ölçme hassasiyeti düşük olan bir sistemin, hassasiyeti daha yüksek olanın dinamik ofsetini (sıfırını) oluşturması prensibine dayanan ve “Kuvvet İleri Beslemesi” diye isimlendirdiğimiz yöntem önerilmiş ve kavramsal olarak tanımlanmıştır. Bu amaçla biri daha hassas fakat belli bir yer değiştirme değerinden sonra lineerliği bozulan, diğeri de daha az hassas fakat her zaman lineer çıkış veren iki farklı mekanik sistem tasarlamıştır. Tasarımlara ilişkin bütün sonuçlar Bölüm 3’te verilmiştir.In this work, the theory, design process, and analysis of analog capacitive MEMS accelerometer system is examined and a high dynamic range MEMS accelerometer system is implemented by using MUMPS surface micromachining process. For the optimization of the mechanical system, by using the analytical models obtained in Section 2, a visual software, named MABEMS, is implemented in C++ programming language. Finite element analysis of the mechanical systems are made by using a commercially available simulation package ANSYS. MATLAB Simulink model of the system is realized for the behavioral level simulations. The charge amplifier topology is used in electronic sensing interface since this configuration eliminates the effect of the parastic capacitances. Mathematical model of the accelerometer, obtained in Section 3, is implemented in PSPICE by using the Analog Behavioral Modelling (ABM) library so, this allowed the simulation of the mechanical device and electronic interface in the same environment. In conventional methods, accelerometers are operated in closed loop by applying feedback signals to increase the performance parameters like dynamic range, bandwidth, and linearity. In this work, a new method, is offered and described conceptually as an alternative to the conventional closed loop systems and this method is named as Force Feed forward Mechanism. In this method, less sensitive system, forms the dynamic offset of the more sensitive device. For this reason, two different mechanical devices are designed such that one of them has high sensitivity but nonlinear output above a certain displacement and the other one has low sensitivity but linear even for large displacements. All the results about the designed systems are given in Section 3.Yüksek LisansM.Sc
Temes, “A noise-shaping accelerometer interface circuit for two-chip implementation
This paper introduces a new architecture for sensor interface circuits using a delta-sigma modulator. The three-level force feedback allows the use of a digital compensator to stabilize the loop. A 3rd-order delta-sigma structure shapes the opamp noise and allows two-chip implementation with high loop gain at low frequencies. 1
Temes, “A noise-shaping accelerometer interface circuit for two-chip implementation
Abstract {Aproposed third-order noise-shaping accelerometer interface circuit enhances the SNR, compared with the previously presented interface circuits. The solution for the twochip implementation is described and a novel cross-coupled CDS integrator is proposed. This scheme functions even with the large parasitic capacitances between the sensor and the interface circuit. The op-amp noise is rst-order shaped. Dithering circuit is also implemented on the chip, fabricated in AMI 1.6 mCMOSprocess
System design of a low-power three-axis underdamped MEMS accelerometer with simultaneous electrostatic damping control
Recently, consumer electronics industry has known a spectacular growth that would have not been possible without pushing the integration barrier further and further. Micro Electro Mechanical Systems (MEMS) inertial sensors (e.g. accelerometers, gyroscopes) provide high performance, low power, low die cost solutions and are, nowadays, embedded in most consumer applications. In addition, the sensors fusion has become a new trend and combo sensors are gaining growing popularity since the co-integration of a three-axis MEMS accelerometer and a three-axis MEMS gyroscope provides complete navigation information. The resulting device is an Inertial measurement unit (IMU) able to sense multiple Degrees of Freedom (DoF). Nevertheless, the performances of the accelerometers and the gyroscopes are conditioned by the MEMS cavity pressure: the accelerometer is usually a damped system functioning under an atmospheric pressure while the gyroscope is a highly resonant system. Thus, to conceive a combo sensor, aunique low cavity pressure is required. The integration of both transducers within the same low pressure cavity necessitates a method to control and reduce the ringing phenomena by increasing the damping factor of the MEMS accelerometer. Consequently, the aim of the thesis is the design of an analog front-end interface able to sense and control an underdamped three-axis MEMSaccelerometer. This work proposes a novel closed-loop accelerometer interface achieving low power consumption The design challenge consists in finding a trade-off between the sampling frequency, the settling time and the circuit complexity since the sensor excitation plates are multiplexed between the measurement and the damping phases. In this context, a patenteddamping sequence (simultaneous damping) has been conceived to improve the damping efficiency over the state of the art approach performances (successive damping). To investigate the feasibility of the novel electrostatic damping control architecture, several mathematical models have been developed and the settling time method is used to assess the damping efficiency. Moreover, a new method that uses the multirate signal processing theory and allows the system stability study has been developed. This very method is used to conclude on the loop stability for a certain sampling frequency and loop gain value. Next, a 0.18μm CMOS implementation of the entire accelerometer signal chain is designed and validated
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Investigation of a noise-shaping accelerometer interface circuit for two-chip implementation
The world market for sensors is several hundred million dollars growing at an annual rate of 20 percent with accelerometers comprising 19 percent of the market. With an increasing market, a wide range of applications with varying degrees of resolution are in demand. Therefore, there is sufficient motivation for developing new architectures that are more accurate, reliable, less costly, and easy to implement in any given application. This research investigates a new proposed architecture intended to improve each of the mentioned motivations. Capacitive sensors and their electrical interfaces measure the displacement of a suspended beam mass in response to an input acceleration. The studied architecture is a two-chip solution with the capacitive sensor and electrical interface fabricated independently. This two-chip approach has several advantages. The micro-machining process for capacitive sensors is difficult with lower yields than most VLSI technologies. By fabricating the electrical interface in a different process with higher yields and smaller geometries, the cost of the architecture is reduced. As micro-machining yields improve, this advantage will diminish in favor of single-chip integration of the sensor and interface. If the production volumes are high and a single-chip solution is best suited for a particular application, this architecture can be easily integrated on one chip. Another advantage of a two-chip solution is the ease of implementation. The sensor is able to he placed at the point of interest while the electrical interface can be placed in a more convenient location. Also, several sensors can be multiplexed to one electrical interface. Sensors can be replaced while keeping the interface circuitry intact. This lowers cost and increases reliability of the system. Given its flexibility, the architecture is easy to implement and maintain in most applications