A Survey on the Best Choice for Modulus of Residue Code

Nowadays, the development of technology and the growing need for dense and complex chips have led chip industries to increase their attention on the circuit testability. Also, using the electronic chips in certain industries, such as the space industry, makes the design of fault tolerant circuits a challenging issue. Coding is one of the most suitable methods for error detection and correction. The residue code, as one of the best choices for error detection aims, is wildly used in large arithmetic circuits such as multiplier and also finds a wide range of applications in processors and digital filters. The modulus value in this technique directly effect on the area overhead parameter. A large area overhead is one of the most important disadvantages especially for testing the small circuits. The purpose of this paper is to study and investigate the best choice for residue code check base that is used for simple and small circuits such as a simple ripple carry adder. The performances are evaluated by applying stuck-at-faults and transition-faults by simulators. The efficiency is defined based on fault coverage and normalized area overhead. The results show that the modulus 3 with 95% efficiency provided the best result. Residue code with this modulus for checking a ripple carry adder, in comparison with duplex circuit, 30% improves the efficiency

A new approach to the design of efficient residue generators for arbitrary moduli

Recent analyses demonstrate that operations in some bases of Residue Number System (RNS) exhibit higher resiliency to process variations than in normal binary number system. Under this premise, arbitrary moduli offer greater flexibility in forming high cardinality balanced RNS with variation-insensitive small residue operations for a given dynamic range. Limited in number theoretic property, converting an integer into residue for an arbitrary modulus is as difficult as complex arithmetic operation, particularly for very large wordlength ratio of integer to modulus. This paper presents a new design of efficient residue generators and the design approach is demonstrated with large input wordlength of 64 bits for arbitrary moduli of up to 6 bits. The proposed design eliminates the bottleneck carry propagation additions and modular adder tree of existing designs, and circumvents the undesirably high architectural disparity for different moduli of inconsistent cyclic periodicity. Our experimental results on moduli of different periodicities show that the proposed design is on average 27.7% faster and 28.7% smaller than the state-of-the-art residue generator. Our power simulation results also show that the proposed residue generator has on average reduced the total power and the leakage power of the latter by 44.5% and 24.7%, respectively