Design and control of a bidirectional wireless charging system using GaN devices

Most of the existing wireless power transfer system works in unidirectional with one-direction control signals. This paper presents a bidirectional wireless charging system with duplex communication method, which is not only able to achieve the two-way wireless power transmission, but also transfer control signals bi-directionally. The power circuit operation mode is actively controlled by using the wireless transceiver module which can duplex communication to deliver measured signals remotely. The operational principle is analytically studied in details and is verified by simulation. Finally, a prototype of the bidirectional charging system using GaN devices has been successfully designed and tested. In addition, the measured feedback signals are effectively transmitted to validate the control algorithm

Novel Current-Mode Sensor Interfacing and Radio Blocks for Cell Culture Monitoring

Since 2004 Imperial College has been developing the world’s first application-specific instrumentation aiming at the on-line, in-situ, physiochemical monitoring of adult stem cell cultures. That effort is internationally known as the ‘Intelligent Stem Cell Culture Systems’ (ISCCS) project. The ISCCS platform is formed by the functional integration of biosensors, interfacing electronics and bioreactors. Contrary to the PCB-level ISCCS platform the work presented in this thesis relates to the realization of a miniaturized cell culture monitoring platform. Specifically, this thesis details the synthesis and fabrication of pivotal VLSI circuit blocks suitable for the construction of a miniaturized microelectronic cell monitoring platform. The thesis is composed of two main parts. The first part details the design and operation of a two-stage current-input currentoutput topology suitable for three-electrode amperometric sensor measurements. The first stage is a CMOS-dual rail-class AB-current conveyor providing a low impedancevirtual ground node for a current input. The second stage is a novel hyperbolic-sinebased externally-linear internally-non-linear current amplification stage. This stage bases its operation upon the compressive sinh−1 conversion of the interfaced current to an intermediate auxiliary voltage and the subsequent sinh expansion of the same voltage. The proposed novel topology has been simulated for current-gain values ranging from 10 to 1000 using the parameters of the commercially available 0.8μm AMS CMOS process. Measured results from a chip fabricated in the same technology are also reported. The proposed interfacing/amplification architecture consumes 0.88-95μW. The second part describes the design and practical evaluation of a 13.56MHz frequency shift keying (FSK) short-range (5cm) telemetry link suitable for the monitoring of incubated cultures. Prior to the design of the full FSK radio system, a pair of 13.56MHz antennae are characterized experimentally. The experimental S-parameter-value determination of the 13.56MHz wireless link is incorporated into the Cadence Design Framework allowing a high fidelity simulation of the reported FSK radio. The transmitter of the proposed system is a novel multi-tapped seven-stage ring-oscillator-based VCO whereas the core of the receiver is an appropriately modified phase locked loop (PLL). Simulated and measured results from a 0.8μm CMOS technology chip are reported

Performance Analysis of a 3D Wireless Massively Parallel Computer

In previous work, the authors presented a 3D hexagonal wireless direct-interconnect network for a massively parallel computer, with a focus on analysing processor utilisation. In this study, we consider the characteristics of such an architecture in terms of link utilisation and power consumption. We have applied a store-and-forward packet-switching algorithm to both our proposed architecture and a traditional wired 5D direct network (the same as IBM’s Blue Gene). Simulations show that for small and medium-size networks the link utility of the proposed architecture is comparable with (and in some cases even better than) traditional 5D networks. This work demonstrates that there is a potential for wireless processing array concepts to address High-Performance Computing (HPC) challenges whilst alleviating some significant physical construction drawbacks of traditional systems

A GaN-based wireless power and information transmission method using Dual-frequency Programmed Harmonic Modulation

Information transmission is often required in power transfer to implement control. In this paper, a Dual-Frequency Programmed Harmonic Modulation (DFPHM) method is proposed to transfer two frequencies carrying power and information with the single converter via a common inductive coil. The proposed method reduces the number of injection tightly coupled transformers used to transmit information, thereby simplifying the system structure and improving reliability. The performances of power and information transmission, and the method of information modulation and demodulation, as well as the principles of the control, are analyzed in detail. Then a simulation model is set up to verify the feasibility of the method. In addition, an experiment platform is established to verify that the single converter can transfer the power and information simultaneously via a common inductive coil without using tightly coupled transformers.Web of Science8498564984

Efficiency Comparison of Inductor-, Capacitor- and Resonant-based Converters Fully Integrated in CMOS Technology

International audienceThe full integration of DC-DC converters offers great promise for dramatic reduction in power consumption and the number of board-level components in complex systems on chip. Some papers compare the numerous published on-chip and on-die converter structures, but there is the need for an approach to accurately compare the main basic DC-DC conversion topologies. Therefore, this paper presents a method to compare the efficiencies of CMOS integrated capacitive-, inductive-and resonant-based switching converters. The loss mechanism of each structure in hard-switching conditions is detailed and the analytical equations of the power loss and output voltage are given as a function of few CMOS technology parameters. The resulting models can be used to accurately predict converter efficiency in the early design phase, to compare the basic structure in particular the technology node or to orient the passive choice. The proposed method is then applied to design, optimize and compare fully-integrated power delivery requirements on a 1mm 2 on-die area in 65nm CMOS technology over three decades of power density. The results also underline the high efficiency of the promising resonant-based converter. Index Terms—integrated switching power supply, on-chip voltage regulator, switched-capacitor converter, inductive power converter, resonant converte