Memory-based parallel data output controller

A memory-based parallel data output controller employs associative memories and memory mapping to decommutate multiple channels of telemetry data. The output controller contains a random access memory (RAM) which has at least as many address locations as there are channels. A word counter addresses the RAM which provides as it outputs an encoded peripheral device number and a MSB/LSB-first flag. The encoded device number and a bit counter address a second RAM which contains START and STOP flags to pick out the required bits from the specified word number. The LSB/MSB, START and STOP flags, along with the serial input digital data go to a control block which selectively fills a shift register used to drive the parallel data output bus

A video display interface for the LORAN-C navigation receiver development system

A microprocessor-based development system was designed and fabricated for prototype test of navigation receiver designs. During use of this system in the development of low-cost LORAN-C receiver/processor concepts, the limitations of the integral KIM-1 display were severely felt. It was to augment this numerical display that the video character display was produced. The circuit design presented meets the need for a flexible-format display capable of driving a small standard video monitor with only minimal demands upon microprocessor memory and MPU cycles

A rocket-borne data-manipulation experiment using a microprocessor

The development of a data-manipulation experiment using a Z-80 microprocessor is described. The instrumentation is included in the payloads of two Nike Apache sounding rockets used in an investigation of energetic particle fluxes. The data from an array of solid-state detectors and an electrostatic analyzer is processed to give the energy spectrum as a function of pitch angle. The experiment performed well in its first flight test: Nike Apache 14.543 was launched from Wallops Island at 2315 EST on 19 June 1978. The system was designed to be easily adaptable to other data-manipulation requirements and some suggestions for further development are included

Programming for energy monitoring/display system in multicolor lidar system research

The Z80 microprocessor based computer program that directs and controls the operation of the six channel energy monitoring/display system that is a part of the NASA Multipurpose Airborne Differential Absorption Lidar (DIAL) system is described. The program is written in the Z80 assembly language and is located on EPROM memories. All source and assembled listings of the main program, five subroutines, and two service routines along with flow charts and memory maps are included. A combinational block diagram shows the interfacing (including port addresses) between the six power sensors, displays, front panel controls, the main general purpose minicomputer, and this dedicated microcomputer system

Application of digital control to a magnetic model suspension and balance model

The feasibility of using a digital computer for performing the automatic control functions for a magnetic suspension and balance system (MSBS) for use with wind tunnel models was investigated. Modeling was done using both a prototype MSBS and a one dimensional magnetic balance. A microcomputer using the Intel 8080 microprocessor is described and results are given using this microprocessor to control the one dimensional balance. Hybrid simulations for one degree of freedom of the MSBS were also performed and are reported. It is concluded that use of a digital computer to control the MSBS is eminently feasible and should extend both the accuracy and utility of the system

The development of a power spectral density processor for C and L band airborne radar scatterometer sensor systems

A real-time signal processor was developed for the NASA/JSC L-and C-band airborne radar scatterometer sensor systems. The purpose of the effort was to reduce ground data processing costs. Conversion of two quadrature channels of data (like and cross polarized) was made to obtain Power Spectral Density (PSD) values. A chirp-z transform (CZT) approach was used to filter the Doppler return signal and improved high frequency and angular resolution was realized. The processors have been tested with record signals and excellent results were obtained. CZT filtering can be readily applied to scatterometers operating at other wavelengths by altering the sample frequency. The design of the hardware and software and the results of the performance tests are described in detail

A data acquisition and handling system for the measurement of radial plasma transport rates

A system which allows the transfer of experimental data from one or more transient recorders to a digital computer, the entry of calibration data and the entry of archival data is described. The overall approach is discussed and illustrated in detail

A Loran-C prototype navigation receiver for general aviation

Prototype equipment was developed for flight evaluation which provides enroute navigation in both latitude-longitude and rho-theta coordinates. The nonprecision approach capabilities of this equipment was evaluated. The antenna/preamplifier coupler, the RF processor, tracking loop hardware, tracking loop software, and the video output are discussed. Laboratory and flight test results are evaluated

Research and development of microcontroller experiment instructional units and their effectiveness with industrial technology, electronic technology, and electrical engineering technology majors

The Motorola MC68HC11 microcontroller is one of the semiconductor achievements that offers various facilities in microprocessor control applications with no need for excessive external support in hardwares. This new product provides the flexibility, efficiency, economy, and simplicity for the designing job of the microprocessor control applications. This study was conducted to improve the current microprocessor teaching materials which are mostly out-of-date and expensive in conducting lab experiments, and to determine the relative effectiveness of the new microprocessor teaching materials. A set of seven explanatory lab experiments were designed and developed on the Motorola MC68HC11 microcontroller EVB (Evaluation Board), and students\u27 learning achievement tests on implementing these set of experiments have been used to determine the effectiveness of the design as well as applications of the microcontroller;Seven explanatory lab experiments were developed and designed according to the current literature reviews of microcontroller and several Industrial Technology microprocessor courses guidelines. The first four of these seven experiments were chosen as samples of students\u27 design projects;A pretest and posttest with matching statistical model was used to evaluate the effectiveness of the explanatory experiments in students learning achievements. The pretest and posttest scores were used in several statistical analyses to compute the significant difference between the two groups. The average days in completing a project were used to compute the differences between the two groups;Results from analyses of the data did not reject the first hypothesis H[subscript]01: There is no significant learning achievement difference between the experimental group students who used the Motorola 68HC11 microcontroller EVB and the control group students who used the traditional microprocessor as their project design tool, and rejected the second hypothesis H[subscript]02: There is no significant difference in time required to complete the assigned projects between the two groups. ;Recommendations for further studies are investigating larger samples from different colleges and universities, designing microcontroller applications at different course levels, applying the microcontroller features to robotics controls, pneumatic or hydraulic servo control, and investigating other higher level microcontrollers applications

Communications for Next Generation single chip computers

It is the thesis of this report that much of what is presently thought to require specialized VLSI functions might instead be achieved by combinations of fast general purpose single chip computers with upgraded communication facilities. To this end, the characteristics of applications of this nature are first surveyed briefly and some working principles established. In the light of these, three different chip philosophies are explored in some detail. This study shows that some upgrading of typical single chip I/O will definitely be necessary, but that this upgrading does not have to be complex and that true multiprocessor-multibus operation could be achieved without excessive cost