Control kernel based adaptive control implementation

[EN] A control system with distributed computing resources always should guarantee the safe control of the plant. In this contribution, the concept of control kernel is used for that purpose. Two types of nodes with different resources are defined: the powerful server node and the resource-constrained light node. This architecture allows to split the control tasks into two blocks. Those demanding strong computing resources are allocated in the server nodes and those compelling tasks required to ensure the safety of the controlled plant are allocated in the light nodes. Resource limitations lead to control adaptation. Two simple applications illustrate some of the benefits of this architecture with one server node and one light node, even the architecture can be extended to several nodes. In the first case, an adaptive control is implemented in the server node, providing the control algorithm to the light node, which is also able to compute a local safe control action. In the second experiment, two different control tasks requiring different resources are implemented in a mobile robot control. To keep bounded the computing time at the local level, the supervisor decides the time allocated to each activity, providing the resulting controller to the light node.This work has been partially granted by Conselleria de Educación Generalitat Valenciana, under PROMETEO project number 2008-088, and Ministerio de Ciencia e Innovaci´on under COBAMI project DPI2011-28507-C02-01/02.Simarro Fernández, R.; Albertos Pérez, P.; Simó Ten, JE. (2013). Control kernel based adaptive control implementation. SIGBED review. 10(1):24-28. doi:10.1145/2492385.2492389S242810

Platform-based design, test and fast verification flow for mixed-signal systems on chip

This research is providing methodologies to enhance the design phase from architectural space exploration and system study to verification of the whole mixed-signal system. At the beginning of the work, some innovative digital IPs have been designed to develop efficient signal conditioning for sensor systems on-chip that has been included in commercial products. After this phase, the main focus has been addressed to the creation of a re-usable and versatile test of the device after the tape-out which is close to become one of the major cost factor for ICs companies, strongly linking it to model’s test-benches to avoid re-design phases and multi-environment scenarios, producing a very effective approach to a single, fast and reliable multi-level verification environment. All these works generated different publications in scientific literature. The compound scenario concerning the development of sensor systems is presented in Chapter 1, together with an overview of the related market with a particular focus on the latest MEMS and MOEMS technology devices, and their applications in various segments. Chapter 2 introduces the state of the art for sensor interfaces: the generic sensor interface concept (based on sharing the same electronics among similar applications achieving cost saving at the expense of area and performance loss) versus the Platform Based Design methodology, which overcomes the drawbacks of the classic solution by keeping the generality at the highest design layers and customizing the platform for a target sensor achieving optimized performances. An evolution of Platform Based Design achieved by implementation into silicon of the ISIF (Intelligent Sensor InterFace) platform is therefore presented. ISIF is a highly configurable mixed-signal chip which allows designers to perform an effective design space exploration and to evaluate directly on silicon the system performances avoiding the critical and time consuming analysis required by standard platform based approach. In chapter 3 we describe the design of a smart sensor interface for conditioning next generation MOEMS. The adoption of a new, high performance and high integrated technology allow us to integrate not only a versatile platform but also a powerful ARM processor and various IPs providing the possibility to use the platform not only as a conditioning platform but also as a processing unit for the application. In this chapter a description of the various blocks is given, with a particular emphasis on the IP developed in order to grant the highest grade of flexibility with the minimum area occupation. The architectural space evaluation and the application prototyping with ISIF has enabled an effective, rapid and low risk development of a new high performance platform achieving a flexible sensor system for MEMS and MOEMS monitoring and conditioning. The platform has been design to cover very challenging test-benches, like a laser-based projector device. In this way the platform will not only be able to effectively handle the sensor but also all the system that can be built around it, reducing the needed for further electronics and resulting in an efficient test bench for the algorithm developed to drive the system. The high costs in ASIC development are mainly related to re-design phases because of missing complete top-level tests. Analog and digital parts design flows are separately verified. Starting from these considerations, in the last chapter a complete test environment for complex mixed-signal chips is presented. A semi-automatic VHDL-AMS flow to provide totally matching top-level is described and then, an evolution for fast self-checking test development for both model and real chip verification is proposed. By the introduction of a Python interface, the designer can easily perform interactive tests to cover all the features verification (e.g. calibration and trimming) into the design phase and check them all with the same environment on the real chip after the tape-out. This strategy has been tested on a consumer 3D-gyro for consumer application, in collaboration with SensorDynamics AG

Núcleo de control y diseño de controladores modulares en entornos distribuidos

Los sistemas empotrados tienen un amplio rango de aplicabilidad en muchos sectores y su importancia crece continuamente. Uno de los campos de aplicación incluye la realización de tareas de control. La heterogeneidad de los sistemas actuales, formados por múltiples componentes de diferentes características conectados en red, sugiere el desarrollo de sistemas de control distribuido en los que las distintas funciones del control se implementen a diferentes niveles. La consideración de sistemas distribuidos con presencia de redes de comunicación, unido a potencia de cálculo limitada, implica la necesidad de considerar la realización del control en condiciones no convencionales, tales como un control local que garantice la seguridad, controles alternativos en función de la disponibilidad de recursos, activación de distintos modos de funcionamiento que garanticen una degradación admisible de prestaciones ante la presencia de retardos, pérdidas de medidas o tiempo excesivo de cálculo. El núcleo de control, asimilable al núcleo de un sistema operativo, se define como el código mínimo que debe ejecutarse en una aplicación de control para que el funcionamiento sea seguro, aunque pueda presentar una fuerte degradación de prestaciones o incluso evolucionar hacia un estado seguro de desconexión. El núcleo de control permite la modularidad y adaptación del sistema, así como la capacidad de desarrollo rápido de aplicaciones de control mediante servicios de soporte (middleware), necesarios para ofrecer a los algoritmos de control soporte para sistemas distribuidos, computación ubicua, movilidad de código y restricciones de tiempo real. El objetivo de la tesis es la creación de una estrategia de control distribuida, con elementos empotrados, utilizando el núcleo de control, en el que se utilicen controladores digitales de altas prestaciones en sistemas con capacidad de cómputo limitada. Además, el sistema de control debe hacer frente a los problemas mencionados anteriormente de pérSimarro Fernández, R. (2011). Núcleo de control y diseño de controladores modulares en entornos distribuidos [Tesis doctoral no publicada]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/11405Palanci