Tuning the Computational Effort: An Adaptive Accuracy-aware Approach Across System Layers

This thesis introduces a novel methodology to realize accuracy-aware systems, which will help designers integrate accuracy awareness into their systems. It proposes an adaptive accuracy-aware approach across system layers that addresses current challenges in that domain, combining and tuning accuracy-aware methods on different system layers. To widen the scope of accuracy-aware computing including approximate computing for other domains, this thesis presents innovative accuracy-aware methods and techniques for different system layers. The required tuning of the accuracy-aware methods is integrated into a configuration layer that tunes the available knobs of the accuracy-aware methods integrated into a system

A Hierarchical Block-Floating-Point Arithmetic

Abstract. In order to give an answer to a question of the arithmetic in future DSP architectures for mobile communication applications, the signal processing quality of different arithmetic representations has been studied. Based on the result, a new approach for implementing block-floating-point arithmetic is proposed. This approach intends to preserve the least-significant-bits (LSBs) to improve signal processing quality. The preservation of LSBs is automatically and perfectly done by hardware. Serveral simulation results show that the proposed block-floatingpoint implementation provides improved SNRs over conventional block-floating-point implementations. For the same number of bits in the memory for each representation, the SNRs better than floating-point are also observed. For multiple datapath DSPs, this implementation also requires significantly less hardware complexity than floatingpoint. 1