860 research outputs found
Automatic Verification of Message-Based Device Drivers
We develop a practical solution to the problem of automatic verification of
the interface between device drivers and the OS. Our solution relies on a
combination of improved driver architecture and verification tools. It supports
drivers written in C and can be implemented in any existing OS, which sets it
apart from previous proposals for verification-friendly drivers. Our
Linux-based evaluation shows that this methodology amplifies the power of
existing verification tools in detecting driver bugs, making it possible to
verify properties beyond the reach of traditional techniques.Comment: In Proceedings SSV 2012, arXiv:1211.587
Operating System Support for Redundant Multithreading
Failing hardware is a fact and trends in microprocessor design indicate that the fraction of hardware suffering from permanent and transient faults will continue to increase in future chip generations. Researchers proposed various solutions to this issue with different downsides: Specialized hardware components make hardware more expensive in production and consume additional energy at runtime. Fault-tolerant algorithms and libraries enforce specific programming models on the developer. Compiler-based fault tolerance requires the source code for all applications to be available for recompilation. In this thesis I present ASTEROID, an operating system architecture that integrates applications with different reliability needs.
ASTEROID is built on top of the L4/Fiasco.OC microkernel and extends the system with Romain, an operating system service that transparently replicates user applications. Romain supports single- and multi-threaded applications without requiring access to the application's source code. Romain replicates applications and their resources completely and thereby does not rely on hardware extensions, such as ECC-protected memory. In my thesis I describe how to efficiently implement replication as a form of redundant multithreading in software. I develop mechanisms to manage replica resources and to make multi-threaded programs behave deterministically for replication.
I furthermore present an approach to handle applications that use shared-memory channels with other programs. My evaluation shows that Romain provides 100% error detection and more than 99.6% error correction for single-bit flips in memory and general-purpose registers. At the same time, Romain's execution time overhead is below 14% for single-threaded applications running in triple-modular redundant mode. The last part of my thesis acknowledges that software-implemented fault tolerance methods often rely on the correct functioning of a certain set of hardware and software components, the Reliable Computing Base (RCB).
I introduce the concept of the RCB and discuss what constitutes the RCB of the ASTEROID system and other fault tolerance mechanisms. Thereafter I show three case studies that evaluate approaches to protecting RCB components and thereby aim to achieve a software stack that is fully protected against hardware errors
Simplifying Embedded System Development Through Whole-Program Compilers
As embedded systems embrace ever more complicated microcontrollers, they present both new capability and new complexity. To simplify their development, some lessons of computer application development will translate with additional work. This thesis offers one such translation. It shows how whole-program compilers - those that broadly analyze a program\u27s entire source code - can achieve performance gains and remove faults in embedded system applications. In so doing, this yields a novel stackless threading system named UnStacked C. UnStacked C enables cooperative multithreading without the risk of stack overflows in embedded system applications. We also propose a novel preemption system called Lazy Preemption. Unstacked C with Lazy Preemption enables stackless preemptive multithreading in embedded systems. These remove the possibility of thread stack overflows, but also significantly reduces the memory required for multithreading in embedded system
An Expressive Language and Efficient Execution System for Software Agents
Software agents can be used to automate many of the tedious, time-consuming
information processing tasks that humans currently have to complete manually.
However, to do so, agent plans must be capable of representing the myriad of
actions and control flows required to perform those tasks. In addition, since
these tasks can require integrating multiple sources of remote information ?
typically, a slow, I/O-bound process ? it is desirable to make execution as
efficient as possible. To address both of these needs, we present a flexible
software agent plan language and a highly parallel execution system that enable
the efficient execution of expressive agent plans. The plan language allows
complex tasks to be more easily expressed by providing a variety of operators
for flexibly processing the data as well as supporting subplans (for
modularity) and recursion (for indeterminate looping). The executor is based on
a streaming dataflow model of execution to maximize the amount of operator and
data parallelism possible at runtime. We have implemented both the language and
executor in a system called THESEUS. Our results from testing THESEUS show that
streaming dataflow execution can yield significant speedups over both
traditional serial (von Neumann) as well as non-streaming dataflow-style
execution that existing software and robot agent execution systems currently
support. In addition, we show how plans written in the language we present can
represent certain types of subtasks that cannot be accomplished using the
languages supported by network query engines. Finally, we demonstrate that the
increased expressivity of our plan language does not hamper performance;
specifically, we show how data can be integrated from multiple remote sources
just as efficiently using our architecture as is possible with a
state-of-the-art streaming-dataflow network query engine
Efficient Parallel Reinforcement Learning Framework using the Reactor Model
Parallel Reinforcement Learning (RL) frameworks are essential for mapping RL
workloads to multiple computational resources, allowing for faster generation
of samples, estimation of values, and policy improvement. These computational
paradigms require a seamless integration of training, serving, and simulation
workloads. Existing frameworks, such as Ray, are not managing this
orchestration efficiently, especially in RL tasks that demand intensive
input/output and synchronization between actors on a single node. In this
study, we have proposed a solution implementing the reactor model, which
enforces a set of actors to have a fixed communication pattern. This allows the
scheduler to eliminate work needed for synchronization, such as acquiring and
releasing locks for each actor or sending and processing coordination-related
messages. Our framework, Lingua Franca (LF), a coordination language based on
the reactor model, also supports true parallelism in Python and provides a
unified interface that allows users to automatically generate dataflow graphs
for RL tasks. In comparison to Ray on a single-node multi-core compute
platform, LF achieves 1.21x and 11.62x higher simulation throughput in OpenAI
Gym and Atari environments, reduces the average training time of synchronized
parallel Q-learning by 31.2%, and accelerates multi-agent RL inference by
5.12x.Comment: 10 pages, 11 figure
Using Embedded Xinu and the Raspberry Pi 3 to Teach Operating Systems
Multicore processors have become the standard in modern computing platforms. Such complex hardware enables faster execution of the programs it runs, but this is only true if its programmer has the knowledge and ability to make it so. Thus, there is a great need to prepare computing students by establishing robust educational tools. Existing tools often include abstract learning environments such as a virtual machine. While such platforms are widely available and convenient, they are unable to expose students to concurrency on real hardware.This paper presents multicore Embedded Xinu, an educational operating system used to teach concurrency concepts at the university level. The latest port of Embedded Xinu to the four-core, ARM-based Raspberry Pi 3 B+ enabled an operating systems curriculum in which students build their own concurrency-oriented kernel and execute it on a real machine. Assignments that have been run in the course include concepts of synchronization, scheduling, and memory allocation on a multicore platform. Upon completing the course, students are capable of solving problems commonly found in the field of parallel computing
Wireless Sensor Network Virtualization: A Survey
Wireless Sensor Networks (WSNs) are the key components of the emerging
Internet-of-Things (IoT) paradigm. They are now ubiquitous and used in a
plurality of application domains. WSNs are still domain specific and usually
deployed to support a specific application. However, as WSN nodes are becoming
more and more powerful, it is getting more and more pertinent to research how
multiple applications could share a very same WSN infrastructure.
Virtualization is a technology that can potentially enable this sharing. This
paper is a survey on WSN virtualization. It provides a comprehensive review of
the state-of-the-art and an in-depth discussion of the research issues. We
introduce the basics of WSN virtualization and motivate its pertinence with
carefully selected scenarios. Existing works are presented in detail and
critically evaluated using a set of requirements derived from the scenarios.
The pertinent research projects are also reviewed. Several research issues are
also discussed with hints on how they could be tackled.Comment: Accepted for publication on 3rd March 2015 in forthcoming issue of
IEEE Communication Surveys and Tutorials. This version has NOT been
proof-read and may have some some inconsistencies. Please refer to final
version published in IEEE Xplor
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