A Low-Power Ultrawideband Low-Noise Amplifier in 0.18 m CMOS Technology

This paper presents an ultrawideband low-noise amplifier chip using TSMC 0.18 m CMOS technology. We propose a UWB low noise amplifier (LNA) for low-voltage and low-power application. The present UWB LNA leads to a better performance in terms of isolation, chip size, and power consumption for low supply voltage. This UWB LNA is designed based on a current-reused topology, and a simplified RLC circuit is used to achieve the input broadband matching. Output impedance introduces the LC matching method to reduce power consumption. The measured results of the proposed LNA show an average power gain (S 21 ) of 9 dB with the 3 dB band from 3 to 5.6 GHz. The input reflection coefficient (S 11 ) less than −9 dB is from 3 to 11 GHz. The output reflection coefficient (S 22 ) less than −8 dB is from 3 to 7.5 GHz. The noise figure 4.6-5.3 dB is from 3 to 5.6 GHz. Input third-orderintercept point (IIP 3 ) of 2 dBm is at 5.3 GHz. The dc power consumption of this LNA is 9 mW under the supply of a 1 V supply voltage. The chip size of the CMOS UWB LNA is 1.03 × 0.78 mm 2 in total