A Low-Noise CMOS THz Imager Based on Source Modulation and an In-Pixel High-Q Passive Switched-Capacitor N-Path Filter

This paper presents the first low noise complementary metal oxide semiconductor (CMOS) terahertz (THz) imager based on source modulation and in-pixel high-Q filtering. The 31 × 31 focal plane array has been fully integrated in a 0 . 13 μ m standard CMOS process. The sensitivity has been improved significantly by modulating the active THz source that lights the scene and performing on-chip high-Q filtering. Each pixel encompass a broadband bow tie antenna coupled to an N-type metal-oxide-semiconductor (NMOS) detector that shifts the THz radiation, a low noise adjustable gain amplifier and a high-Q filter centered at the modulation frequency. The filter is based on a passive switched-capacitor (SC) N-path filter combined with a continuous-time broad-band Gm-C filter. A simplified analysis that helps in designing and tuning the passive SC N-path filter is provided. The characterization of the readout chain shows that a Q factor of 100 has been achieved for the filter with a good matching between the analytical calculation and the measurement results. An input-referred noise of 0 . 2 μ V RMS has been measured. Characterization of the chip with different THz wavelengths confirms the broadband feature of the antenna and shows that this THz imager reaches a total noise equivalent power of 0 . 6 nW at 270 GHz and 0 . 8 nW at 600 GHz

A 533pW NEP 31×31 pixel THz image sensor based on in-pixel demodulation

A THz 31×31 pixel, 100 fps image sensor integrated in a 130 nm CMOS process is presented. Taking advantage of the possibility to modulate the active source that lights the scene, a significant improvement in sensitivity and NEP is achieved by shifting the modulated THz radiation, by means of an antenna/MOSFET, then filtering the signal band using an in-pixel 16-paths passive SC-filter combined with a CT Gm-C filter resulting in a high Q factor of 100. This THz imager features a measured NEP of 533 pW at 270 GHz and 732 pW at 600 GHz respectively, and a sensitive readout chain with an input referred noise of 0.2 μVRMS

Plasmonic Terahertz Detector Based on Asymmetric Silicon Field-Effect Transistor for Real-Time Terahertz Imaging System

Department of Electrical EngineeringTerahertz (THz) technology has a great potential application owing to the unique properties of THz wave that has both permeability and feature of straight. Among the various technology in THz frequency range, THz imaging technology is very promising and attractive owing to harmlessness in human body by very low energy. In particular, for real-time THz imaging detectors, field-effect transistor (FET)-based THz detectors are now being intensively developed in multi-pixel array configuration by exploiting the silicon (Si) technology advantages of low-cost and high density integration. FET-based plasmonic wave detection mechanism, which is not limited by cut-off frequency as in transit-mode, has attractive features such as enhanced responsivity (Rv) according to frequency increase in THz range and robustness to high THz input power. To analyze the operation principle of plasmonic THz detector, an analytical device model has been implemented in terms of device physics. The non-resonant and ???overdamped??? plasma-wave behaviors have been modeled by introducing a quasi-plasma electron charge box as a two-dimensional electron gas (2DEG) in the channel region only around the source side of Si FETs. Based on the coupled non-resonant plasma-wave physics and continuity equation on the technology computer-aided design (TCAD) platform, the alternate-current (ac) signal as an incoming THz wave radiation successfully induced a direct-current (dc) drain-to-source output voltage as a detection signal in a sub-THz frequency regime under the asymmetric boundary conditions between source and drain. The significant effects of asymmetric source and drain structure, channel shape on the charge asymmetry and performance enhancement have been analytically investigated based on non-resonant plasmonic THz detection theory. By designing and fabricating an asymmetric transistor integrated with antenna, more enhanced channel charge asymmetry has been obtained for enhanced detection response. Through verification of the advanced non-quasi-static (NQS) compact model, the intrinsic FET delay and total detector delay in THz plasmonic detection are successfully characterized and are small enough to guarantee a real-time operating detector. These results can provide that the real-time THz imaging of moving objects has been experimentally demonstrated based on plasmonic 1x200 array scanner by using the high/fast detecting performance asymmetric FET and multiplexer/amplifier circuits. The highly-enhanced Rv and reduced noise equivalent power (NEP) have been demonstrated by exploiting monolithic transistor-antenna device considering impedance matching between transistor and antenna. This record-high enhancement is due to antenna mismatching and feeding line loss reduction as well as the enhanced charge asymmetry in the proposed monolithic transistor-antenna device. Therefore, high-performance plasmonic THz detector based on asymmetric Si FET can compete as commercial THz detector by taking advantages of monolithic device technology for real-time THz imaging system.ope

Ultra Low Noise CMOS Image Sensors

CMOS Image Sensors (CIS) overtook the charge coupled devices (CCDs) in low noise performance. Photoelectron counting capability is the next step for CIS for ultimate low light performance and new imaging paradigms. This work presents a review of CMOS image sensors based on pinned photo diodes (PPDs). The latter includes the historical background, the PPD physics and the readout chain circuits used for low-noise performance. The physical mechanisms behind the random fluctuations affecting the signal at different levels of conventional CIS readout chains are reviewed and clarified. This thesis dedicates a particular focus to the readout circuit noise given that it precludes photoelectron counting in conventional CIS. A detailed analytical calculation of the temporal read noise (TRN) in conventional CIS readout chain is presented. The latter suggests different noise reduction techniques at process and circuit design level. Among the noise reduction techniques suggested by the analytical noise calculation, the increase of the oxide capacitance by using a thin oxide in-pixel amplifying transistor, for low 1/f noise, is suggested for the first time. A test chip designed in a 180 nm CIS process and embedding optimized readout chains exploiting the new pixels together with state-of-the-art 4T pixels optimized at process level for low 1/f noise. A mean input-referred noise of 0.4 e-rms has been measured. Compared with the state-of-the-art pixels, also present onto the test chip, the mean RMS noise is divided by more than 2. Based on these encouraging result, a full VGA (640H×480V) imager has been integrated in a standard CIS process. The presented imager relies on a 4T pixel of 6.5 µm pitch with a properly sized and biased thin oxide PMOS source follower. A full characterization of the proposed image sensor, at room temperature, is presented. The sensor chip features an input-referred noise histogram from 0.25 e-rms to a few e-rms peaking at 0.48 e-rms. This sub-0.5 electron noise performance is obtained with a full well capacity of 6400 e- and a frame rate that can go up to 80 fps. The VGA imager also features a fixed pattern noise as low as 0.77%, a lag of 0.1% and a dark current of 5.6 e-/s. Correlated multiple sampling (CMS) is a noise reduction technique commonly used in low noise CIS. This work presents an original design for CMS based on a passive switched-capacitor network, with a minimum number of capacitors. The proposed circuit requires no additional active circuitry, has no impact on the output dynamic range and does not need multiple analog-to-digital conversions. It was verified with transient noise simulations and shows a noise reduction in perfect agreement with ideal CMS. For a future perspective, the impact of the technology downscale on CIS sensitivity from an electronic read noise aspect is investigated. Active imaging in the Terahertz (THz) band is an emerging technology. Source modulation combined with a selective filtering can be used to reduce the noise in CMOS THz imagers. This work presents the first integration of a 1 kpixel CMOS THz imager integrating, in each pixel, a metal antenna with a MOS rectifier, low noise amplification and highly selective filtering, based on a switch-capacitor N-path filter combined with a broad band Gm-C filter. The latter has been tested successfully. An input-referred noise of 0.2 µV RMS corresponding to a total noise equivalent THz power of 0.6 nW at 270 GHz and 0.8 nW at 600 GHz