0.42 THz Transmitter with Dielectric Resonator Array Antenna

Off chip antennas do not occupy the expensive die area, as there is no limitation on their building material, and can be built in any size and shape to match the system requirements, which are all in contrast to on-chip antenna solutions. However, integration of off-chip antennas with Monolithic-Microwave-Integrated Chips (MMIC) and designing a low loss signal transmission from the signal source inside the MMIC to the antenna module is a major challenge and trade off. High resistivity silicon (HRS), is a low cost and extremely low loss material at sub-THz. It has become a prevailing material in fabrication of passive components for THz applications. This work makes use of HRS to build an off-chip Dielectric Resonator Antenna Array Module (DRAAM) to realize a highly efficient transmitter at 420 GHz. This work proposes novel techniques and solutions for design and integration of DRRAM with MMIC as the signal source. A proposed scalable 4×4 antenna structure aligns DRRAM on top of MMIC within 2 μm accuracy through an effortless assembly procedure. DRAAM shows 15.8 dB broadside gain and 0.85 efficiency. DRAs in the DRAAM are differentially excited through aperture coupling. Differential excitation not only inherently provides a mechanism to deliver more power to the antenna, it also removes the additional loss of extra balluns when outputs are differential inside MMIC. In addition, this work proposes a technique to double the radiation power from each DRA. Same radiating mode at 0.42 THz inside every DRA is excited through two separate differential sources. This approach provides an almost loss-less power combining mechanism inside DRA. Two 140_GHz oscillators followed by triplers drive each DRA in the demonstrated 4×4 antenna array. Each oscillator generates 7.2 dBm output power at 140 GHz with -83 dBc/Hz phase noise at 100 KHz and consumes 25 mW of power. An oscillator is followed by a tripler that generates -8 dBm output power at 420 GHz. Oscillator and tripler circuits use a smart layer stack up arrangement for their passive elements where the top metal layer of the die is grounded to comply with the planned integration arrangement. This work shows a novel circuit topology for exciting the antenna element which creates the feed element part of the tuned load for the tripler circuit, therefore eliminates the loss of the transition component, and maximizes the output power delivered to the antenna. The final structure is composed of 32 injection locked oscillators and drives a 4×4 DRAAM achieves 22.8 dBm EIRP

Dynamically Controllable Integrated Radiation and Self-Correcting Power Generation in mm-Wave Circuits and Systems

This thesis presents novel design methodologies for integrated radiators and power generation at mm-wave frequencies that are enabled by the continued integration of various electronic and electromagnetic (EM) structures onto the same substrate. Beginning with the observation that transistors and their connections to EM radiating structures on an integrated substrate are essentially free, the concept of multi-port driven (MPD) radiators is introduced, which opens a vast design space that has been generally ignored due to the cost structure associated with discrete components that favors fewer transistors connected to antennas through a single port. From Maxwell's equations, a new antenna architecture, the radial MPD antennas based on the concept of MPD radiators, is analyzed to gain intuition as to the important design parameters that explain the wide-band nature of the antenna itself. The radiator is then designed and implemented at 160 GHz in a 0.13 um SiGe BiCMOS process, and the single element design has a measured effective isotropic radiated power (EIRP) of +4.6 dBm with a total radiated power of 0.63 mW. Next, the radial MPD radiator is adapted to enable dynamic polarization control (DPC). A DPC antenna is capable of controlling its radiated polarization dynamically, and entirely electronically, with no mechanical reconfiguration required. This can be done by having multiple antennas with different polarizations, or within a single antenna that has multiple drive points, as in the case of the MPD radiator with DPC. This radiator changes its polarization by adjusting the relative phase and amplitude of its multiple ports to produce polarizations with any polarization angle, and a wide range of axial ratios. A 2x1 MPD radiator array with DPC at 105 GHz is presented whose measurements show control of the polarization angle throughout the entire 0 degree through 180 degree range while in the linear polarization mode and maintaining axial ratios above 10 dB in all cases. Control of the axial ratio is also demonstrated with a measured range from 2.4 dB through 14 dB, while maintaining a fixed polarization angle. The radiator itself has a measured maximum EIRP of +7.8 dBm, with a total radiated power of 0.9 mW, and is capable of beam steering. MPD radiators were also applied in the domain of integrated silicon photonics. For these designs, the driver transistor circuitry was replaced with silicon optical waveguides and photodiodes to produce a 350 GHz signal. Three of these optical MPD radiator designs have been implemented as 2x2 arrays at 350 GHz. The first is a beam forming array that has a simulated gain of 12.1 dBi with a simulated EIRP of -2 dBm. The second has the same simulated performance, but includes optical phase modulators that enable two-dimensional beam steering. Finally, a third design incorporates multi-antenna DPC by combining the outputs of both left and right handed circularly polarized MPD antennas to produce a linear polarization with controllable polarization angle, and has a simulated gain of 11.9 dBi and EIRP of -3 dBm. In simulation, it can tune the polarization from 0 degrees through 180 degrees while maintaining a radiated power that has a 0.35 dB maximum deviation from the mean. The reliability of mm-wave radiators and power amplifiers was also investigated, and two self-healing systems have been proposed. Self-healing is a global feedback method where integrated sensors detect the performance of the circuit after fabrication and report that data to a digital control algorithm. The algorithm then is capable of setting actuators that can control the performance of the mm-wave circuit and counteract any performance degradation that is observed by the sensors. The first system is for a MPD radiator array with a partially integrated self-healing system. The self-healing MPD radiator senses substrate modes through substrate mode pickup sensors and infers the far-field radiated pattern from those sensors. DC current sensors are also included to determine the DC power consumption of the system. Actuators are implemented in the form of phase and amplitude control of the multiple drive points. The second self-healing system is a fully integrated self-healing power amplifier (PA) at 28 GHz. This system measures the output power, gain and efficiency of the PA using radio frequency (RF) power sensors, DC current sensors and junction temperature sensors. The digital block is synthesized from VHDL code on-chip and it can actuate the output power combining matching network using tunable transmission line stubs, as well as the DC operating point of the amplifying transistors through bias control. Measurements of 20 chips confirm self-healing for two different algorithms for process variation and transistor mismatch, while measurements from 10 chips show healing for load impedance mismatch, and linearity healing. Laser induced partial and total transistor failure show the benefit of self-healing in the case of catastrophic failure, with improvements of up to 3.9 dB over the default case. An exemplary yield specification shows self-healing improving the yield from 0% up through 80%.</p

SILICON TERAHERTZ ELECTRONICS: CIRCUITS AND SYSTEMS FOR FUTURE APPLICATIONS

The terahertz frequency bands are gaining increasing attention these days for the potential applications in imaging, sensing, spectroscopy, and communication. These applications can be used in a wide range of fields, such as military, security, biomedical analysis, material science, astronomy, etc. Unfortunately, utilizing these frequency bands is very challenging due to the notorious ”terahertz gap”. Consequently, current terahertz systems are very bulky and expensive, sometimes even require cryogenic conditions. Silicon terahertz electronics now becomes very attractive, since it can achieve significantly lower cost and make portable consumer terahertz devices feasible. However, due to the limited device fmax and low breakdown voltage, signal generation and processing on silicon platform in this frequency range is challenging. This thesis aims to tackle these challenges and implement high-performance terahertz systems. First of all, the devices are investigated under the terahertz frequency range and optimum termination conditions for maximizing the efficacy of the devices is derived. Then, novel passive surrounding networks are designed to provide the devices with the optimal termination conditions to push the performances of the terahertz circuit blocks. Finally, the high-performance circuit blocks are used to build terahertz systems, and system-level innovations are also proposed to push the state of the art forward. In Chapter 2, using a device-centric bottom-up design method, a 210-GHz harmonic oscillator is designed. With the parasitic tuning mechanism, a wide frequency tuning range is achieved without using lossy varactors. A passive network based on the return-path gap coupler and self-feeding structure is also designed to provide optimal terminations for the active devices to maximize the harmonic power generation. Fabricated with a 0.13-um SiGe BiCMOS process, the oscillator is highly compact with a core size of only 290x95 um2. The output frequency can be tuned from 197.5 GHz to 219.7 GHz, which is around 10.6% compared to the center frequency. It also achieves a peak output power and dc-to-RF efficiency of 1.4 dBm and 2.4%, respectively. The measured output phase noise at 1 MHz offset is -87.5 dBc/Hz. The high power, wide tuning range, low phase noise, as well as compact size, make this oscillator very suitable for terahertz systems integration. In Chapter 3, the design of a 320-GHz fully-integrated terahertz imaging system is described. The system is composed of a phase-locked high-power transmitter and a coherent high-sensitivity subharmonic-mixing receiver, which are fabricated using a 0.13-um SiGe BiCMOS technology. To enhance the imaging sensitivity, a heterodyne coherent detection scheme is utilized. To obtain frequency coherency, fully-integrated phase-locked loops are implemented on both the transmitter and receiver chips. According to the measurement, consuming a total dc power of 605 mW, the transmitter chip achieves a peak radiated power of 2 mW and a peak EIRP of 21.1 dBm. The receiver chip achieves an equivalent incoherent responsivity of more than 7.26 MV/W and a sensitivity of 70.1 pW under an integration bandwidth of 1 kHz, with a total dc power consumption of 117 mW. The achieved sensitivity with this proposed coherent imaging transceiver is around ten times better compared with other state-of-the-art incoherent imagers. In Chapter 4, a spatial-orthogonal ASK transmitter architecture for high-speed terahertz wireless communication is presented. The self-sustaining oscillator-based transmitter architecture has an ultra-compact size and excellent power efficiency. With the proposed high-speed constant-load switch, significantly reduced modulation loss is achieved. Using polarization diversity and multi-level modulation, the throughput is largely enhanced. Array configuration is also adopted to enhance the link budget for higher signal quality and longer communication range. Fabricated in a 0.13-um SiGe BiCMOS technology, the 220-GHz transmitter prototype achieves an EIRP of 21 dBm and dc-to- THz-radiation efficiency of 0.7% in each spatial channel. A 24.4-Gb/s total data rate over a 10-cm communication range is demonstrated. With an external Teflon lens system, the demonstrated communication range is further extended to 52 cm. Compared with prior art, this prototype demonstrates much higher transmitter efficiency. In Chapter 5, an entirely-on-chip frequency-stabilization feedback mechanism is proposed, which avoids the use of both frequency dividers and off-chip references, achieving much lower system integration cost and power consumption. Using this mechanism, a 301.7-to-331.8-GHz source prototype is designed in a 0.13-um SiGe BiCMOS technology. According to the measurement, the source consumes a dc power of only 51.7 mW. The output phase noise is -71.1 and -75.2 dBc/Hz at 100 kHz and 1 MHz offset, respectively. A -13.9-dBm probed output power is also achieved. Overall, the prototype source demonstrates the largest output frequency range and lowest power consumption while achieving comparable phase noise and output power performances with respect to the state of the art. All the designs demonstrated in this thesis achieve good performances and push the state of the art forward, paving the way for implementation of more sophisticated terahertz circuits and systems for future applications

Monolithic Transformers for RF Electronics

In this thesis transformers for RF integrated circuits are investigated. Monolithic transformers are widely used in various RF and high frequency circuits. For instance, transformers are used as power combiners in power amplifiers, in small signal amplifiers they are used for advanced feedback arrangements, they enable integrated filter implementation, they are used as baluns and impedance matching networks, and they can be used as resonators in oscillators. Unfortunately foundry supported models for on-chip transformers are rarely available and circuit designers need to design and characterize their own transformers using electro magnetic (EM) field simulator. This is a time consuming and laborious task, yet rigorous optimization of transformer characteristics results in significant improvements. Therefore one of the aims of this thesis was to develop an automated EM simulator environment. The thesis starts with representation of transformer basics and then different types of structures for such devices are introduced and discussed. One structure called "Interleaved Transformer" is chosen to be the basis of the design for its good magnetic coupling, symmetry, high frequency range and need of only two layers. More than 50 samples of these devices are designed and characterized. This is done with the help of an automated layout drawing program that was developed in this thesis. Afterwards, they are compared to illustrate how changing the dimensions can help us achieve desired properties. From these comparisons we have generated guidelines on how to for instance maximize quality factor, band width, or coupling coefficient. Based on these findings we can conclude what dimensional properties are needed for a specific circuit requirement and finally find out how to choose correct transformer dimensions for given applications

Silicon Integrated Arrays: From Microwave to IR

Integrated chips have enabled realization and mass production of complex systems in a small form factor. Through process miniaturization many novel applications in silicon photonics and electronic systems have been enabled. In this thesis I have provided several examples of innovations that are only enabled by integration. I have also demonstrated how electronics and photonics circuits can complement each other to achieve a system with superior performance.</p

New Circuit Techniques Enabling Millimeter-Wave and Terahertz Transceivers in Nanoscale Silicon

The vastly under-utilized spectrum in the sub-THz frequency range enables disruptive applications including 10Gb/s chip-to-chip wireless communications and imaging/spectroscopy. Owing to aggressive scaling in feature size and device fT/fmax, nanoscale CMOS technology potentially enables integration of sophisticated systems at this frequency range. This dissertation mainly focuses on the design of a 210GHz fundamental transceiver and also covers the design of a W-band fully integrated imaging system utilizing a novel concept of spatial-overlapping super pixels. Firstly, a 210GHz transceiver with OOK modulation in a 32nm SOI CMOS process (fT/fmax=250/320GHz) is presented. The transmitter (TX) employs a 2×2 spatial combining array consisting of a double-stacked cross-coupled voltage controlled oscillator (VCO) at 210GHz with an on-off-keying (OOK) modulator, a power amplifier (PA) driver, a novel balun-based differential power distribution network, four PAs and an on-chip 2×2 dipole antenna array. The non-coherent receiver (RX) utilizes a direct detection architecture consisting of an on-chip antenna, a low noise amplifier (LNA), and a power detector. The VCO generates measured -13.5dBm output power; and the PA shows a measured 15dB gain and 4.6dBm Psat. The LNA exhibits a measured in-band gain of 18dB and minimum in-band noise figure (NF) of 11dB. The TX achieves an EIRP of 5.13dBm at 10dB back-off from saturated power. It achieves an estimated EIRP of 15.2dBm when the PAs are fully driven. This is the first demonstration of a fundamental frequency CMOS transceiver at the 200GHz frequency range.Secondly, a W-band direct-detection-based receiver array in an advanced 0.18µm BiCMOS process is presented, which incorporates a new concept of spatial-overlapping super-pixels for millimeter-wave imaging applications. The use of spatial-overlapping super-pixels results in (1) improved SNR at the pixel level through a reduction of spillover losses, (2) partially correlated adjacent super-pixels, (3) a 2×2 window averaging function in the RF domain, (4) the ability to compensate for the systematic phase delay and amplitude variations due to the off-focal-point effect for antennas away from the focal point, and (5) the ability to compensate for mutual coupling effects among the array elements. The receiver chip achieves a measured peak coherent responsivity of 1,150MV/W, an incoherent responsivity of 1,000MV/W, a minimum noise-equivalent power (NEP) of 0.28fW/Hz^1/2 and a front-end 3-dB bandwidth from 87-108GHz, while consuming 225mW per receiver element. The measured noise-equivalent temperature difference (NETD) of the SiGe receiver chip is 0.45K with a 20ms integration time