Dual-band lightweight, low-cost RF front-end solutions for point-to-point wireless applications

The objective of this work is to achieve the integration of a state-of-the-art RF CMOS chip in lightweight multilayer-organic (MLO) substrates at millimeter-wave frequencies. To do this, first the substrates need to be characterized above 30 GHz. This was done through the Ring Resonator Method. Once the loss and dielectric properties were known, the layers for the MLO stack-up were chosen and two different antenna arrays were designed for the chip’s communication. Subsequently, a hybrid integration with a silicon interposer layer was developed in preparation for the future CMOS chip. This integration consisted of a combination of flip-chip bonding assisted by a non-conductive film (NCF) layer to secure the bonding. Finally, since the chip has two different operating frequencies, an exhaustive orientation study for the arrays was performed. The study revealed the best orientation for the antennas in order to minimize interaction between them in the package. The final package possesses the ability to simultaneously excite both array designs, and also includes all interconnects and transitions required by the RF CMOS chip. Although the main focus is at millimeter-wave frequencies, other novel techniques at different frequencies are discussed, such as utilizing microfluidic channels to reduce the size of RF designs, characterizing 3D-printing materials, and designing the first micro-dispensed antenna in Ka band. All of these help to highlight the ability and versatility of organic substrates at high frequencies.Ph.D

Analysis and design on low-power multi-Gb/s serial links

High speed serial links are critical components for addressing the growing demand for I/O bandwidth in next-generation computing applications, such as many-core systems, backplane and optical data communications. Due to continued process scaling and circuit innovations, today's CMOS serial link transceivers can achieve tens of Gb/s per pin. However, most of their reported power efficiency improves much slower than the rise of data rate. Therefore, aggregate I/O power is increasing and will exceed the power budget if the trend for more off-chip bandwidth is sustained. In this work, a system level statistical analysis of serial links is first described, and compares the link performance of Non-Return-to-Zero (2-PAM) with higher-order modulation (duobinary) signaling schemes. This method enables fast and accurate BER distribution simulation of serial link transceivers that include channel and circuit imperfections, such as finite pulse rise/fall time, duty cycle variation, and both receiver and transmitter forwarded-clock jitter. Second, in order to address link power efficiency, two test chips have been implemented. The first one describes a quad-lane, 6.4-7.2 Gb/s serial link receiver prototype using a forwarded clock architecture. A novel phase deskew scheme using injection-locked ring oscillators (ILRO) is proposed that achieves greater than one UI of phase shift for multiple clock phases, eliminating phase rotation and interpolation required in conventional architectures. Each receiver, optimized for power efficiency, consists of a low-power linear equalizer, four offset-cancelled quantizers for 1:4 demultiplexing, and an injection-locked ring oscillator coupled to a low-voltage swing, global clock distribution. Measurement results show a 6.4-7.2Gb/s data rate with BER < 10⁻¹² across 14 cm of PCB, and an 8Gb/s data rate through 4cm of PCB. Designed in a 1.2V, 90nm CMOS process, the ILRO achieves a wide tuning range from 1.6-2.6GHz. The total area of each receiver is 0.0174mm², resulting in a measured power efficiency of 0.6mW/Gb/s. Improving upon the first test chip, a second test chip for 8Gb/s forwarded clock serial link receivers exploits a low-power super-harmonic injection-locked ring oscillator for symmetric multi-phase local clock generation and deskewing. Further power reduction is achieved by designing most of the receiver circuits in the near-threshold region (0.6V supply), with the exception of only the global clock buffer, test buffers and synthesized digital test circuits at nominal 1V supply. At the architectural level, a 1:10 direct demultiplexing rate is chosen to achieve low supply operation by exploiting high-parallelism. Fabricated in 65nm CMOS technology, two receiver prototypes are integrated in this test chip, one without and the other with front-end boot-strapped S/Hs. Including the amortized power of global clock distribution, the proposed serial link receivers consume 1.3mW and 2mW respectively at 8Gb/s input data rate, achieving a power efficiency of 0.163mW/Gb/s and 0.25mW/Gb/s. Measurement results show both receivers achieve BER < 10⁻¹² across a 20-cm FR4 PCB channel

Convergence of millimeter-wave and photonic interconnect systems for very-high-throughput digital communication applications

In the past, radio-frequency signals were commonly used for low-speed wireless electronic systems, and optical signals were used for multi-gigabit wired communication systems. However, as the emergence of new millimeter-wave technology introduces multi-gigabit transmission over a wireless radio-frequency channel, the borderline between radio-frequency and optical systems becomes blurred. As a result, there come ample opportunities to design and develop next-generation broadband systems to combine the advantages of these two technologies to overcome inherent limitations of various broadband end-to-end interconnect systems in signal generation, recovery, synchronization, and so on. For the transmission distances of a few centimeters to thousands of kilometers, the convergence of radio-frequency electronics and optics to build radio-over-fiber systems ushers in a new era of research for the upcoming very-high-throughput broadband services. Radio-over-fiber systems are believed to be the most promising solution to the backhaul transmission of the millimeter-wave wireless access networks, especially for the license-free, very-high-throughput 60-GHz band. Adopting radio-over-fiber systems in access or in-building networks can greatly extend the 60-GHz signal reach by using ultra-low loss optical fibers. However, such high frequency is difficult to generate in a straightforward way. In this dissertation, the novel techniques of homodyne and heterodyne optical-carrier suppressions for radio-over-fiber systems are investigated and various system architectures are designed to overcome these limitations of 60-GHz wireless access networks, bringing the popularization of multi-gigabit wireless networks to become closer to the reality. In addition to the advantages for the access networks, extremely high spectral efficiency, which is the most important parameter for long-haul networks, can be achieved by radio-over-fiber signal generation. As a result, the transmission performance of spectrally efficient radio-over-fiber signaling, including orthogonal frequency division multiplexing and orthogonal wavelength division multiplexing, is broadly and deeply investigated. On the other hand, radio-over-fiber is also used for the frequency synchronization that can resolve the performance limitation of wireless interconnect systems. A novel wireless interconnects assisted by radio-over-fiber subsystems is proposed in this dissertation. In conclusion, multiple advantageous facets of radio-over-fiber systems can be found in various levels of end-to-end interconnect systems. The rapid development of radio-over-fiber systems will quickly change the conventional appearance of modern communications.PhDCommittee Chair: Gee-Kung Chang; Committee Member: Bernard Kippelen; Committee Member: Shyh-Chiang Shen; Committee Member: Thomas K. Gaylord; Committee Member: Umakishore Ramachandra