A 1.8-GHz CMOS VCO tuned by an accumulation-mode MOS varactor

This work presents a 1.8-GHz VCO tuned by a pMOS capacitor working exclusively in the accumulation and depletion regions. The VCO has been fabricated in a standard 0.6 μm CMOS process. It shows a tuning range of about 11% and a phase noise of -137 dBc/Hz at 3 MHz offset from the carrier, for a current consumption of 2.7 mA. The VCO compares favorably with a CMOS VCO tuned by a reverse biased diode varacto

Design of CMOS LC voltage controlled oscillators

This work presents the design and implementation of CMOS LC voltage controlled oscillators. On-chip planar spiral inductors and PMOS inversion mode varactors were utilized to implement the resonator. Two voltage controlled oscillators (VCOs) were realized as a part of this work, one designed to operate at 1.1 GHz while the second at 1.8 GHz. Both VCOs were implemented in a scalable digital CMOS process, with the former in a 1.5 micron CMOS process and the latter in a 0.5 micron technology. A simulation based methodology was adopted to arrive at a simple pi model used to model the metal and substrate related losses responsible for deteriorating the integrated inductor\u27s performance. Geometry based optimization techniques were utilized to arrive at an inductor geometry that ensures reasonable quality factor. In addition to the core VCO structure a host of test structures have been incorporated in order to carry out two-port network measurements in the future. Such measurements should enable one to gain a greater insight into the integrated inductor and varactor\u27s performance

Giga-hertz CMOS voltage controlled oscillators.

Leung Lai-Kan.Thesis (M.Phil.)--Chinese University of Hong Kong, 2001.Includes bibliographical references (leaves 131-154).Abstracts in English and Chinese.Abstract --- p.iAcknowledgement --- p.iiiTable of Contents --- p.ivList of Figures --- p.ixList of Tables --- p.xvChapter Chapter 1 --- Introduction --- p.1Chapter 1.1 --- Overview --- p.1Chapter 1.2 --- Objectives --- p.2Chapter 1.3 --- Thesis Organization --- p.4Chapter Chapter 2 --- Fundamentals of Voltage Controlled Oscillators --- p.6Chapter 2.1 --- Definition of Commonly Used Figures of Merit --- p.6Chapter 2.1.1 --- Cutoff frequency --- p.6Chapter 2.1.2 --- Center Frequency --- p.8Chapter 2.1.3 --- Tuning Range --- p.8Chapter 2.1.4 --- Tuning Sensitivity --- p.8Chapter 2.1.5 --- Output Power --- p.8Chapter 2.1.6 --- Power Consumption --- p.9Chapter 2.1.7 --- Supply Pulling --- p.9Chapter 2.2 --- Phase Noise --- p.9Chapter 2.2.1 --- Definition of Phase Noise --- p.9Chapter 2.2.2 --- Phase Noise Specification --- p.11Chapter 2.2.3 --- Leeson's formula --- p.12Chapter 2.2.4 --- Models developed by J. Cranincks and M. Steyaert10 --- p.13Chapter 2.2.5 --- Linear Time-Variant Phase Noise Model --- p.13Chapter 2.3 --- Building Blocks of Voltage Controlled Oscillators --- p.17Chapter 2.3.1 --- FETs --- p.17Chapter 2.3.2 --- Varactor --- p.18Chapter 2.3.3 --- Spiral Inductor --- p.21Chapter 2.3.4 --- Modeling of the Spiral Inductor --- p.24Chapter 2.3.5 --- Analysis and Simulation --- p.26Chapter Chapter 3 --- Digital Controlled Oscillator --- p.28Chapter 3.1 --- Introduction --- p.28Chapter 3.2 --- General Principle of Oscillation --- p.28Chapter 3.3 --- Different Oscillator Architectures --- p.30Chapter 3.3.1 --- Single-ended Ring Oscillator --- p.30Chapter 3.3.2 --- Differential Ring Oscillator --- p.32Chapter 3.3.3 --- CMOS Injection-locked Oscillator --- p.33Chapter 3.4 --- Basic Principle of the Injection-locked Oscillator --- p.34Chapter 3.5 --- Digital Controlled Oscillator --- p.36Chapter 3.5.1 --- R-2R Digital-to-Analog Converter --- p.37Chapter 3.6 --- Injection Locking --- p.42Chapter 3.6.1 --- Synchronization Model of the Injection Locked Oscillator --- p.42Chapter 3.7 --- Simulation Results --- p.44Chapter 3.7.1 --- Frequency Tuning Characteristics --- p.44Chapter 3.7.2 --- Phase Noise Performance --- p.47Chapter 3.7.3 --- Locking Characteristics --- p.48Chapter 3.7.4 --- Sensitivity to Supply Voltage and Temperature --- p.48Chapter 3.8 --- Conclusion --- p.49Chapter Chapter 4 --- CMOS LC Voltage Controlled Oscillator --- p.51Chapter 4.1 --- Introduction --- p.51Chapter 4.2 --- LC Oscillator --- p.52Chapter 4.3 --- Circuit Design --- p.54Chapter 4.3.1 --- Oscillation Frequency --- p.55Chapter 4.3.2 --- Oscillation Amplitude --- p.58Chapter 4.3.3 --- Transistor Sizing --- p.59Chapter 4.3.4 --- Power Consumption --- p.62Chapter 4.3.5 --- Tuning Range --- p.62Chapter 4.3.6 --- Phase Noise Analysis --- p.63Chapter 4.4 --- Conclusion --- p.70Chapter Chapter 5 --- LC Quadrature Voltage Controlled Oscillator --- p.71Chapter 5.1 --- Introduction --- p.71Chapter 5.2 --- Conventional CMOS Quadrature LC Voltage Controlled Oscillator --- p.73Chapter 5.3 --- Operational Principle of the CMOS Quadrature LC Voltage Controlled Oscillator --- p.74Chapter 5.3.1 --- General Explanation --- p.74Chapter 5.3.2 --- Mathematical Analysis --- p.75Chapter 5.3.3 --- Drawback of the Conventional CMOS LC Quadrature VCO --- p.77Chapter 5.4 --- Novel CMOS Low Noise Quadrature Voltage Controlled Oscillator --- p.78Chapter 5.4.1 --- Equivalent Output Noise due to the Coupling Transistor --- p.80Chapter 5.4.2 --- Linear Time Varying Model for the Analysis of Total Phase Noise --- p.83Chapter 5.4.3 --- Tuning Range --- p.94Chapter 5.4.4 --- Start-up Condition --- p.95Chapter 5.4.5 --- Power Consumption --- p.97Chapter 5.5 --- New Tuning Mechanism of the Proposed LC Quadrature VCO --- p.98Chapter 5.6 --- Modified Version of the Proposed LC Quadrature Voltage Controlled Oscillator --- p.105Chapter 5.7 --- Conclusion --- p.108Chapter Chapter 6 --- Layout Consideration --- p.109Chapter 6.1 --- Substrate Contacts --- p.109Chapter 6.2 --- Guard Rings --- p.110Chapter 6.3 --- Thermal Noise of the Gate Interconnect --- p.111Chapter 6.4 --- Use of Different Layers of Metal for Interconnection --- p.112Chapter 6.5 --- Slicing of Transistors --- p.113Chapter 6.6 --- Width of Interconnecting Wires and Numbers of Vias --- p.114Chapter 6.7 --- Matching of Devices --- p.114Chapter 6.8 --- Die Micrographs of the Prototypes of the Oscillators --- p.115Chapter Chapter 7 --- Experimental Results --- p.118Chapter 7.1 --- Methodology --- p.118Chapter 7.2 --- Evaluation Board --- p.119Chapter 7.3 --- Measurement Setup --- p.123Chapter 7.4 --- Experimental Results --- p.125Chapter 7.4.1 --- CMOS Injection Locked Oscillator --- p.125Chapter 7.4.2 --- LC Differential Voltage Controlled Oscillator --- p.128Chapter 7.4.3 --- LC Quadrature Voltage Controlled Oscillator --- p.132Chapter 7.5 --- Summary of Performance --- p.139Chapter Chapter 8 --- Conclusion --- p.142Chapter 8.1 --- Contribution --- p.142Chapter 8.2 --- Further Development --- p.143Chapter Chapter 9 --- Appendix --- p.145Chapter 9.1 --- Circuit Transformation --- p.145Chapter 9.2 --- Derivation of the Inductor Model with PGS --- p.146Chapter 9.2.1 --- "Inductance," --- p.146Chapter 9.2.2 --- "Series Resistance, Rs" --- p.146Chapter 9.2.3 --- Series Capacitance --- p.147Chapter 9.2.4 --- Shunt Oxide Capacitance --- p.147Chapter 9.3 --- Calculation of Phase Noise Using the Linear Time Variant Model --- p.148Chapter Chapter 10 --- Bibliography --- p.15