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A-PLR: Accumulative backup of mapping information for power loss recovery

By ?????????

Abstract

In NAND flash memory based storage systems, a flash translation layer (FTL) is usually employed to hide shortcomings of NAND flash memory such as erase-before-write and asymmetric read/write response time. Although there are several types of FTLs according to the mapping granularity, it is a recent trend to use a page-level mapping FTL. There are two basic methods of power loss recovery (PLR) schemes for page-level mapping FTL: per-page-unit method and the map block-unit method; however, these methods have shortcomings in term of the recovery time and the mapping information management overhead, respectively. In order to overcome disadvantages of PLR, thus, we propose a novel PLR, named accumulative backup of mapping information for power loss recovery (A-PLR), which provides a stable data recovery performance without any management overhead. ??2010 IEEE

Topics: NAND flash memory, Level mapping, Recent trends, Storage systems, Computer system recovery, Mapping, Recovery time, Information management, Mapping information, Recovery, Response time, Spare area, Data recovery, Power-losses, Flash memory, NAND circuits, Flash translation layer
Publisher: IEEE
Year: 2010
DOI identifier: 10.1109/ICNIDC.2010.5657783
OAI identifier: oai:repository.hanyang.ac.kr:20.500.11754/86443
Provided by: HANYANG Repository
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