In this paper, a new CMOS high performance fully
differential second-generation current conveyor (FDCCII) is
presented. The proposed FDCCII provides good linearity, high
output impedance at terminals Z+ and Z-, and excellent output–
input current gain accuracy. What is more, it is operated at lower
supply voltage of ± 1.25 V. As an application, a published current
mode universal filter is realized with proposed FDCCIIs to
demonstrate its versatility. The proposed FDCCII and its
applications are simulated by using CMOS 0.35 μm technology

Karac, Firat

Kuntman, Hakan

Özcan, Sadri

DSpace at University of West Bohemia

New High Performance  CMOS Fully Differential Current Conveyor  Fırat Kaçar1   Hakan Kuntman2   Sadri Özcan3  F. Kacar1: Dept. of Electrical-Electronics Eng. Istanbul University, 34320, Avcılar, Istanbul, Turkey (fkacar@istanbul.edu.tr) H. Kuntman2 and S. Özcan3: Dept. of Electronics and Comm. Eng. Istanbul Technical University, 34469, Maslak, Istanbul, Turkey, (kuntman@itu.edu.tr), (sozcan@itu.edu.tr) Abstract— In this paper, a new CMOS high performance fully differential second-generation current conveyor (FDCCII) is presented. The proposed FDCCII provides good linearity, high output impedance at terminals Z+ and Z-, and excellent output–input current gain accuracy. What is more, it is operated at lower supply voltage of ± 1.25 V. As an application, a published current mode universal filter is realized with proposed FDCCIIs to demonstrate its versatility. The proposed FDCCII and its applications are simulated by using CMOS 0.35 µm technology. Index Terms— Current conveyors, CMOS analog integrated circuits, Active filters.   I. INTRODUCTION  An analog circuit design using the current mode approach has recently gained considerable attention, because of its inherent advantages such as wide bandwidth, high slew rate, low power consumption, and simple circuitry [1]. The second generation current conveyor (CCII) is one of the most versatile current mode building blocks. Since its introduction [2], several circuit realizations have been made for its implementation [3]-[8]. The CCII is a single-ended device; however, most modern high-performance analog integrated circuits incorporate fully differential signal paths. This is because fully-differential circuit configurations have been widely used in high-frequency analog signal applications such as switched capacitor filters [9] and mute-standard wireless receivers [10]. As compared to their single-ended counterparts, they have higher rejection capabilities to clock-feed-through, and to charge injection errors and power supply noises. They also have a larger output dynamic range, higher design flexibility, and reduced harmonic distortion. Moreover, most modern systems employ both analog and digital parts on the same chip. A fully differential architecture of the analog part becomes more essential as it provides immunity to digital noise. In this study, a new implementation for FDCCII is proposed, based on an improved active-feedback cascode current mirror (IAFCCM) [11]. The output resistances at terminals Z+ and Z- of the proposed FDCCII are calculated and it provides high output resistances, compared with its published counterpart cascode FDCCII, theoretically [12, 13]. The circuit exhibits also excellent output–input gain accuracy both in voltage and current mode [14]. Besides, as an application, a current-mode universal filter chosen from the literature, by employing the proposed fully differential current conveyor (FDCCII) is simulated [15].  II. THE PROPOSED CIRCUITS  The FDCCII is basically a fully differential device as shown in Fig. 1. Using standard notation, the symbol of FDCCII shown in Fig. 1 and its i-v relationship is given by matrix equation in Eq. (1)   VY1 Y1  ZA+  FDCCII VY3 VZA+ Y2 Y3 VY2 VXA XA Y4 VY4 VXB XB  ZA-  ZB+  ZB- VZA- VZB+ VZB- IY1 IY2 IY3 IY4 IZA+ IZA- IZB+ IZB- IXA IXB   Figure 1.  The Symbol of the FDCCII 1 12 23 34 40 0 0 0 0 0 0 00 0 0 0 0 0 0 00 0 0 0 0 0 0 00 0 0 0 0 0 0 01 1 1 0 0 0 0 01 1 0 1 0 0 0 00 0 0 0 1 0 0 00 0 0 0 0 1 0 0Y YY YY YY YXA XAXB XBZAZAZBZBI VI VI VI VV IV IVIVI±±±±                        =    −    −        ±    ±                              (1) The CMOS realization of the cascode FDCCII is shown in Fig. 2 [12]. It is possible to increase the output resistances and the accuracy of the current transformations of FDCCII by using the cascode current mirrors between terminals X and Y, X and Z+, and Y and Z as shown in Fig. 2. The Z− output resistance of the cascode FDCCII is given by Eq. (2).  34 33 34 35 36 35( ) //( )z ds ds m ds ds mR r r g r r g− ≅           (2)  Where rids and gmi denote the output resistance and small signal transconductance of the ith transistor, respectively.  To increase the output resistance of the proposed FDCCII the improved active-feedback cascode current mirrors (IAFCCM) are added to the circuit [11] by designing the output stages. The proposed high performance FDCCII is shown in Fig. 3. A major advantage of IAFCCM circuit is that    the output conductance and the feedback capacitance are 100 times lower than the standard current mirror circuit [11].  Although the number of transistors used in its implementation of new FDCCII are more than its counterpart the output resistance is much higher. The output resistance at terminal Z of new FDCCII shown in Fig. 3, is calculated as in Eq. (3) 3 1 1 3 1 2 1 1 13 1 1 3 1 2 1 1 1[ ( // )] //[ ( // )]z m N mKN ds N ds N dsKN dsCNm P mKP ds P ds P dsKP dsCPR g g r r r rg g r r r r−≅            (3) From Eq. (3) it can be seen easily that the output resistance of the proposed FDCCII is much higher than the published counterpart cascode FDCCII.  Figure 2.  Cascode multiple outputs fully differential second generation current conveyor (FDCCII) [13]    Figure 3.   The proposed high performance mutiple outputs fully differential second generation current conveyor (FDCCII) III. SIMULATION RESULTS AND COMPARISON The performance of the proposed FDCCII is verified and compared with regular cascode FDCCII by SPICE simulation, using TSMC CMOS 0.35µm process model parameters for MOS transistors. Their aspect ratios are given in Table 1. The supply voltages, and biasing voltages, and currents are given by VDD =−VSS =1.25V, Vbp =−Vbn = 0V, and IB = ISB = 125 µA, respectively. The main dc and ac characteristics of the cascode and proposed high performance FDCCIIs, such as plots of VX against VY, plots of IZ± against VY, frequency responses of VX/VZ and IZ±/IX are obtained. The DC transfer characteristic of VX against VY for the cascode and the proposed FDCCIIs are shown in Fig. 4. The input voltage is applied to terminal Y. The output voltage is then obtained at X, with an infinite load resistance connected at X; while output Z is grounded. The voltage limits at terminal X for the proposed FDCCII are obtained as: VXmax=390mV and VXmin=-390mV. Figure 5 shows IX-IZ dc characteristics of the cascode and proposed FDCCII for short-circuited terminals X and Z. The lower and upper boundaries of the current IZ for the proposed FDCCII are determined as: IZ+max=0.8mA and IZ+min= -0.8mA for positive Z terminal and negative Z terminal. The frequency responses of the voltage follower (VX/VY) and current follower (IZ/IX) are shown in Figs. 6, and 7 respectively. The f3dB frequencies for the proposed FDCCII are found as 2.02GHz and 2.15 GHz for VX/ VY, IZ/IX. The lower f-3dB frequency for the voltage and current follower configurations in the proposed FDCCII stems from the higher output    resistance at terminal Z. However, it can be seen from Figs. 6 and 7 that the voltage and current gains for the proposed FDCCII are closer to unity, hence it has the higher accuracy. The frequency responses of the output impedances at terminals Z for different types of FDCCII is shown in Fig. 8. The output resistances for the proposed FDCCII at terminals Z (impedances at low frequencies) are found as 577.68MΩ which are much higher than regular cascode FDCCII which has of value of 9.8MΩ     Figure 4.  Relation between VY and VX for  cascode and proposed  of   FDCCII  Figure 5.  Relation between IX and IZ for  cascode and proposed  of  FDCCII  Figure 6.   Frequency response of VY/VX for  cascode and proposed  of FDCCII   Figure 7.  Frequency response of IZ/IX  for  cascode and proposed  of FDCCII   Figure 8.  Frequency response of the output impedance at ZZ  terminal  for  cascode and proposed of  FDCCII                  Table.1 Transistors aspect ratios for the  proposed circuit Transistors W(µm) L(µm) M1-M6, MBP,MCP, M1N-M3N, MAN,MKN 8.75 0.7 M7-M9,M13 70 0.7 M10-M12,M16 17.5 0.7 M14,M15,M19,M20 0.7 0.7 M17, M21, M27, M25-M26, M31-M32, M1P-M3P, MAP,MKP, MBN,MCN 35 0.7 M18, M22-M24, M28-M30 8.75 0.7 M31,M32 105 0.7 IV. APPLICATION EXAMPLE AND SIMULATION RESULTS As an application example, a CM multifunctional filter, shown in Fig. 9 [15] -with one input and three outputs- chosen from the literature is used to demonstrate the performance of the proposed FDCCII by replacing with previous ones.   Figure 9.  Universal current-mode multifunction filter [15] Transfer functions are given as follows 223 2 1 1 2 21 1HPinI sIs sR C R C R C=+ +                                (4)  3 223 2 1 1 2 211 1BPinsR CIIs sR C R C R C=+ +                                 (5)  1 1 2 223 2 1 1 2 211 1LPinI R C R CIs sR C R C R C=+ +                                    (6)    The ωo and Q are also given as follows. 01 1 2 21R C R Cω =            231 1 2CQ RR C R=               (7) The CM multifunction filter has been simulated using the SPICE program to verify the theoretical analyses. Simulated gain low-pass, band-pass, high-pass, amplitude-frequency responses are shown in Fig. 10. The resistance and the capacitance have been chosen as R1=R2=R3=22.5kΩ, C1=100pF and C2=50pF, respectively for the pole frequency of fo=100 kHz. Since the Z output impedance is very high, the multifunction filter has very high output impedances, hence, the circuits are suitable for cascading when the Z terminal is connected to a current-mode circuit. To test the input dynamic rang of the proposed filters, the simulation of the band-pass filter as an example has been repeated for a sinusoidal input signal at fo≈100 kHz. Figure 11 shows that the input dynamic range of the filter response extends up to amplitude of         200 µA(p-p) without significant distortion. The dependence of the output harmonic distortion on the input signal amplitude is illustrated in Fig. 12.    Figure 10. Frequency response of the current-mode filter (HP, BP, LP) for cascode and proposed of the FDCCII.   Figure 11. Input and output waveforms of the band-pass filter of for  100kHz sinusoidal input current of 200µA (peak to peak)  Figure 12. Dependence of output current harmonic distortion on input current amplitude of the proposed band-pass filter V. CONCLUSION A new high performance fully differential second-generation current conveyor FDCCII is presented. The proposed circuit uses improved active-feedback cascode current mirrors (IAFCCM), which significantly causes the output resistance at terminal Z to be higher than pervious ones. The circuit has a bandwidth of about 2 GHz under heavy capacitive loads and can operate with the supply voltages as low as ±1.25 V. The proposed block is also useful in mixed-mode applications where fully differential signal processing is required. By applying the proposed (FDCCII) to a chosen CM universal filter and by performing SPICE, the high performance capability and the versatility of the circuit are also demonstrated.   VI. REFERENCES [1] A. M. Soliman, “Novel Generation Method of Current Mode Wein Type Oscillators using Current Conveyors,” Int. J. Of Electronics, vol. 85, 1998, pp. 737-747. [2] A. Sedra and K. Smith, “A Second-Generation Current Conveyor and its Applications,” IEEE Trans. Circuits Syst., vol. CT-17, 1970, pp. 132-134. [3] B. Wilson, “High Performance Current Conveyor Implementation,” Electron. Lett., vol. 20, 1984, pp. 990-991. [4]  M. Cheng and C. Toumazou, “3 V MOS Current Conveyor Cell for VLSI Technology,” Electron. Lett., vol. 29, 1993, pp. 317-318. [5] H. Elwan and A. Soliman, “A Novel CMOS Current Conveyor Realization with an Electronically Tunable Current-Mode Filter  Suitable for VLSI,” IEEE Trans. Circuits Syst. II, vol. 43, 1996, pp. 663-670. [6] S. Mahmoud and A. Soliman, “Low Voltage Rail to Rail CMOS  Current Feedback Operational Amplifier and its Applications for Analog VLSI,” Analog Integrated Circuits and Signal Proc., vol. 25, 2000, pp. 47-57. [7] H. Elwan and A. Soliman, “Low Voltage Low Power CMOS Current Conveyors,” IEEE Trans. Circuits Syst. I, vol. 44, 1997, pp. 828-835. [8] S. Mahmoud and I. Awad, “Fully Differential CMOS Current Feedback Operational Amplifier,” Analog Integrated Circuits and Signal Proc., vol. 43, pp. 61-69, 2005. [9] T. Choi, R. Kaneshiro, R. Bodersen, P. Gray, W. Jett, and M. Wilcox, “High-Frequency CMOS Switched-Capacitor Filters for Communications Application,” IEEE J. Solid-state Circuits, vol. SC-18, 1983, pp. 652-663. [10] J. Rudell, J.-J. Ou, T. Cho, G. Chien, F. Brianti, J. Weldon, and P. Gray, “A 1.9 GHz Wide-Band IF Double Conversion CMOS  Receiver for Cordless Telephone Applications,” IEEE J. Solid-State Circuits, vol. 32, 1997, pp. 2071-2088. [11] A. Zeki, H. Kuntman,  “Accurate and high output impedance current mirror suitable for CMOS current output stages”, Electron Lett vol. 33, 1997, pp. 1042–1043. [12] A.A., El-Adaway,  A.M. Soliman, and H.O. Elwan, “A novel Fully Differential Current Conveyor and Applications for analog VLSI”, IEEE Trans Circuits System II, Analog Digit. Signal Process, vol. 47(4), 2000,  pp. 306-313.  [13] J.W. Horng, C.L. Hou, C.M. Chang, H.P. Chou, C.T. Lin, and Y.H. Wen “Quadrature Oscillators with Grounded Capacitors and Resistors Using FDCCIIs” ETRI Journal, vol. 28, (4), 2006, pp. 486-494. [14] A.M. Soliman, “New Fully-Differential CMOS Second-Generation Current Conveyer” ETRI Journal, vol. 28, (4), 2006, pp. 495-501. [15] F. Gür, “Design of Universal Active RC filter with Differential Current Conveyor”, Ms.C. Thesis, Institute of Science and Technology, Istanbul Technical University, 2007.   

English

New high performance CMOS fully differential current conveyor

University of West Bohemia Digital Library

http://dspace5.zcu.cz/bitstream/11025/462/1/r2c3c6.pdf

New high performance CMOS fully differential current conveyor

Abstract

Similar works

Full text

Available Versions

DSpace at University of West Bohemia

University of West Bohemia Digital Library

University of West Bohemia Digital Library