Includes bibliographical references.This paper describes a clustered yield model for complex surface mount technology (SMT) assemblies and multichip modules (MCM's). Based on yield modeling techniques that have been proven in the manufacturing of integrated circuits (IC's), this model uses the negative binomial distribution of defects to calculate board yield after test. Manufacturing data validates that this model accurately predicts the clustering of defects and the yield predictions are significantly better than traditional binomial models

Chen, Tom W.

Tegethoff, Mick M. V.

English

This paper describes a clustered yield model for complex surface mount technology (SMT) assemblies and multichip modules (MCM's). Based on yield modeling techniques that have been proven in the manufacturing of integrated circuits (IC's), this model uses the negative binomial distribution of defects to calculate board yield after test. Manufacturing data validates that this model accurately predicts the clustering of defects and the yield predictions are significantly better than traditional binomial models

Chen, Tom W., author

Tegethoff, Mick M. V., author

IEEE, publisher

Mountain Scholar (Digital Collections of Colorado and Wyoming)

640 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING, AND MANUFAcruRING TECHNOLOGY-PART B, VOL. 18. NO.4. NOVEMBER 1995A Clustered Yield Model forSMT Boards and MCM'sMick M. V. Tegethoff, Member, IEEE, and Tom W. ChenAbstract-This paper describes a clustered yield model for com-plex surface mount technology (SMT) assemblies and multichipmodules (MCM's). Based on yield modeling techniques that havebeen proven in the manufacturing of integrated circuits (IC's),this model uses the negative binomial distribution of defects tocalculate board yield after test. Manufacturing data validates thatthis model accurately predicts the clustering of defects and theyield predictions are significantly better than traditional binomialmodels.Index Terms-Yields, SMT, MCM, board, clustered.I. MOTIVATIONSU~ACE mount techn~logy assembly yield modeling isan Important part of design for manufacturing (DFM) andof design for test (DFf) of electronic products. If the yield canbe estimated accurately, the manufacturing cost, the capacityof the manufacturing line, the procurement of material, and theon-time-delivery of the product can be properly managed. Onthe other hand, if yield predictions are off, the effects will befelt in the manufacturing process and also in the profit marginof the product. An accurate yield model is particularly neededwhen the product is in the design stage, when trade-offs inDFM and testability can still be made.Current board yield models are based on a binomial distri-bution of defects [1]. This approach predicts the yield well forassemblies which are not very complex. However, for complexSMT boards, namely boards for which the average number ofdefects is greater than I, the binomial model will underestimatethe yield since there is significant clustering of defects in aSMT production line.II. DESCRlPfION OF THE MODELThis model was developed on the premise that defects oncomplex SMT boards are clustered. This premise was validatedby examining data from production boards at Hewlett-Packard(HP). Predictions of yield based on binomial distribution ofdefects were underestimating the yield by as much as 10 times.There has been much work done on modeling of clusteredphenomena. Rogers described how the negative binomialdistribution can be used to model clustering of retail storesManuscript received June 2. 1994; revised January 13, 1995.M. M. V Tegethoff is with the Hewlett-Packard Company, ManufacturingTest Division. Loveland, CO 80539 USA.T. W. Chen is with the Department of Electrical Engineering, ColoradoState University, Fort Collins, CO 80523 USA.IEEE Log Number 9414341.in a given town [2]. Stapper and many others have usedthe negative binomial distribution to predict yield of largeintegrated circuits [3], [4]. However, these methods are notdirectly applicable to SMT assemblies since the fault spectrumof an SMT board is not easily modeled in terms of defectdensity.A. Fault SpectrumAn accurate characterization of the fault spectrum is thefirst step in SMT yield modeling. The fault spectrum is usedto estimate the average number of defects per board. Forreleased processes and for components that are already part ofinventory, this is a matter of characterizing current products toobtain the failure data. For new assembly processes, customASIC and new parts: failure rate goals need to be set andproper plans put in place to ensure that they will be met.The fault spectrum can be broken into two major parts: theassembly faults caused by the SMT manufacturing process(such as solder opens, solder shorts, misloads, cracked, etc.),and functional faults, which include single component per-formance faults and multiple component interaction faults.Component performance faults are usually test escapes fromthe component test. The fault spectrum for the board is derivedby estimating the assembly faults on a per solder joint basisand functional faults on a per component basis.The assembly fault probability model and functional prob-ability model are based on a binomial distribution of defects.Consider a series on n independent trials, each resulting ineither a fault or no fault, with fp being the fault probability inany trial. Further assume that f p remains constant from trialto trial. Then defining X as the random variable of the numberof faults in n trials, the probability of k faults in n trials hasa binomial distribution given byn!P[X = k; n, fp] = k!(n _ k)! f pk(l - fp)n-k.In yield modeling, we are interested in the probability of atleast one fault, which is one minus the probability of zerofaults. To obtain the probability of zero faults in n trials, weset k to zero in the above equation and obtainP[X = 0;] = (1- fp)n.Then the probability of at least one fault, P f, in n trials withfault probability f p isPf=l-(l-fp)n.1070-9894/95$04.00 © 1995 IEEETEGETHOFF AND CHEN: A CLUSTERED YIELD MODEL FOR SMT BOARDS AND MCM'S 641In practice, it is not easy to obtain the fault probability f p forevery component and every type of solder joint. In order toapply this model in the real world of manufacturing, we needto estimate the fault probability f p by defining the averagepoint estimate fault probability AvgFP,NFAvgFP = NTwhere N F is the number of units that failed a certain testand NT is the total number that participated in that test. Inthe case of manufacturing data we approximate this averagepoint estimate fault probability with data collected over themanufacturing life of components and solder joints. This datais usually kept in parts per million (PPM).B. Average Number of Defects per BoardOnce the fault spectrum is characterized, one can estimatethe average number of defects per board. However, the testcoverage has to be included if one is interested in yield aftertest. The average number of defects per board is analogous tothe average number of defects in IC yield calculations.C. Test EffectivenessTest effectiveness is defined as the actual detection offaults by the given coverage. As with the fault spectrum, testcoverage is estimated for both assembly and functional faultsfor each test step. Type I errors are modeled by introducing ano trouble found (NTF) defect rate. Type II errors are modeledby derating the estimated coverage by an experimental factor.D. Clustering FactorIn order to model yield using the negative binomial dis-tribution of defects, a clustering factor has to be estimated.One would expect the clustering factor to remain constantfor a given SMT process, as long as the boards have similarcomplexity. The estimation of the clustering factor needs tobe performed experimentally and will vary for different SMTprocesses.E. What is Clustered?In evaluating the manufacturing process of complex SMTassemblies, one determines that not all defects are clustered.Solder defects tend to be clustered, especially for finer pitchcomponents. Functional defects can be adequately modeledwith the binomial distribution. Non-solder assembly defects,such as cracked, misloads, reversed polarity, and wrong valuecomponent, also can be adequately modeled with the binomialdistribution, The overall yield is then obtained by multiplyingthe clustered and the nonclustered yield.III. MATHEMATICAL BASIS FOR THE MODELIn order to make the model manageable, the board isdivided into categories according to different components. Themodel calculates the average number of defects by componentcategory. To obtain the overall average number of defects perboard, the defects from each component category are summedtogether. Calculations are done separately for functional faults,clustered assembly defects, and nonclustered assembly defects.The overall yield is the product of the individual yieldsy = y cl *Y ncl *Y f ctwhere Y is the overall yield after test, Y cl is the yield fromclustered defects, Y ncl is the yield from nonclustered defects,and Y f et is the yield from functional defects.A. Defect RatesDefect rates are a function of the assembly process and ofthe individual components [5], [6]. The following defect ratesare characterized for a given SMT process and component:• per joint solder defect rate for each type of joint,• per component functional defect rate,• per component assembly workmanship defect rate,• per component test no-trouble-found defect rate.The binomial distribution is used to compute the incomingprobability of at least one defect per component for solderdefects [1]PDs = 1- [1 - DRjt]Njtwhere P Ds is the probability of at least 1 solder defect, N jtis the number of joints in the component, and DRjt is thesolder joint defect rate.B. Average Number of Defects per BoardThe average number of defects per board found after testfor each type of yield is computed as follows [1]:where the sum is over all categories, D is the average numberof defects per board, N is the number of components percategory, P D is the incoming prob of defects, and T E is thetest effectiveness per category.C. Nonclustered YieldFor functional defects and nonsolder assembly defects thebinomial distribution of defects was assumed, To calculate theprobability of catching x defects, the Poisson approximation ofthe binomial distribution provides sufficient accuracy becausethe sample size is large and the defect rate is small for mostcases that will be encountered. The Poisson approximationcalculates the probability of a test catching x defects per board.Setting A equal to D, the average number of defects found perboard, we have [I]The nonclustered yield is then obtained when the test catcheso defects (x = 0 in the above formula).642 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING, AND MANUFACfURING TECHNOLOGY-PART B, VOL. 18, NO.4, NOVEMBER 1995TABLE IBOARD COMPLEXITYBoard II II Solder joints Complexity1 4239 A2 6832 A3 11490 A4 6202 BD. Clustered YieldThe modeling of clustered yield is the innovative aspectof this model. Solder defects make up the majority of SMTdefects, and their behavior is very clustered.In the original research for this model the approach wasto look at clustering for each type of solder joint and alsoclustering in a batch of boards. However, once the data wasexamined it became clear that the it was sufficient to modelclustering for all solder joint types on a per board basis. Thissimplifies the model significantly, since only one clusteringfactor needs to be determined.The solder defects are modeled using the negative binomialdistribution given as [3]In IC yield modeling, the average number of defects ,X iscalculated as the product of the process defect density andthe chip area.SMT processes do not have a defect density number sincean assembly is made up of various components with differentpitches and different solder joint defect rate. In fact thesolderability of a 20 mil SMT part with 250 pins is verydifferent from a 2-pin resistor or a through hole connector.However, an analogous average number of defects per boardcan be obtained as described in Section IV.B above giving[ D]-aYcl= 1+-;IV. MODEL VALIDATIONThis model was validated using data from 4 different highvolume complex SMT boards at HP. Table I shows the boardsused in validation.In Table I boards with complexity A have through-hole,SMT 50 mil, SMT 25 mil, and SMT 20 mil components;boards with complexity B are like A except that they have noSMT 20 mil components.A. Alpha EstimationThe value of alpha was estimated based on the distributionof defects per board. Table II shows an example of a boardwith its distribution of solder defects.If we let ,X be the mean and (J' the standard deviation of thedata in Table II, the value of alpha can be estimated by [3],X2a = (J'2 ~,x'TABLE IIDEFECT DISTRIBUTION PER BOARDIboards with 0 defects 1000Iboards with 1 defects 300Iboardswith 2 defects ISOIboards with >16 defects 2TABLE illYIELD MODEL RESULTSBoud Actual Binomi.1 Clualer=If Yield Yield Yield1 a SO.05%ofa 98.03%ofa2 b 44.24%ofb 105.26% ofb3 C 9.68%ofC 98.03%ofC4 d 31.84%ofd 64.93% ofdIn investigating 4 boards from HP's manufacturing line,Boards I and 3 (Table I) were used to estimate the clusteringfactor. It was found that an average 0: range of 0.35--0.45should be used for the given process.B. Yield CalculationThe model was used to predict yield for all 4 boards. In thefollowing results variables are used in place of actual yieldssince we are interested in reporting model accuracy not datafrom a given SMT process. Table III gives the yield modelingresults. Actual yield is the measured yield in the manufacturingline for a 4 month period. Binomial yield is the yield calculatedby assuming Poisson distribution for all defects [I]. Clusteredyield is the yield calculated with the model described in thispaper. In Table III, 105.26% of b, means the value of the actualyield b, plus 5.26% of the value b.The values for the clustered model above were obtainedwith 0: = 0.4. In the range 0.35--0.45, all yields except board4 are predicted correctly by the clustered model.Boards I, 2, and 3 span the typical yield spectrum for theSMT process used because of their difference in number ofsolder joints. However, they are similar in complexity and den-sity. It is very encouraging that the clustering was predictableacross this variety of yields. Board 3 is the largest board,with the largest average number of defects per board. As onewould expect, the binomial model significantly underestimatesthe yield, where the clustered model excels.Board 4 is less dense and less complex than the other 3, thusits defect rates were lower and the clustering factor smaller.Although in practice one would need to scale defect rates andclustering factor based on complexity, it is encouraging thatthe cluster modeled predicted a yield two times closer to theactual yield than the binomial model.V. CONCLUSIONThis paper described a clustered model to predict yieldof complex SMT boards. The major goal of this work wasto develop a yield model which will better predict yieldof new designs so that as new products are developed theTEGETHOFF AND CHEN: A CLUSTERED YIELD MODEL FOR SMT BOARDS AND MCM'S 643manufacturing ramp can be properly managed. The model usesthe negative binomial distribution to predict the clustering ofsolder defects and Poisson distribution to model functionaldefects and nonsoldered assembly defects The average numberof defects per board is obtained from defect rate goals and thetest effectiveness used.Validation of the model with data from the HP manufactur-ing line shows that the clustering effect is properly modeledand the yield predictions are excellent for a varied yieldspectrum of boards of similar solder joint mix. The modelis clearly superior to the binomial models currently used.The cluster parameter will vary for different SMT processes.The characterization of the defect rates is also a necessarystep which requires great discipline and process control. If theSMT assemblies are not very complex, binomial modeling willbe sufficient, but for the highly complex boards with averagenumber of defects greater than 1 clustering is going to be adominant factor in yield predictions.REFERENCES[I] M. V. Tegethoff et al.• "Board test DFT model for computer products,"in Proc. Inte. Test Conf., 1992. pp. 367-371.[2] A. Rogers. Statistical Analysis of Spatial Dispersion. London. UK;Pion Limited. 1974.[3] J. A. Cunningham. "The use and evaluation of yield models in integratedcircuits manufacturing," IEEE Trans. Semiconduct. Manufact.. vol. 3.no. 2. pp. 60-71, May 1990.[4] C. H. Stapper et al., "Integrated circuit yield statistics," Proc. IEEE, vol.71. no. 4, pp. 453-470, Apr. 1983.[5] G. Nobel and J. Gleason, "Tolerance issues in SMT assembly," in Proc.Surface Mount Int., 1991, pp. 266-273.[6] E. O. Schlotzhauer and R. J. Balzer, "Real-world board test effective-ness: What does it mean when the board passes?" in Proc. Int. TestConf., 1987, pp. 792-797.Mick M. V. Tegethoff (M'85) received the B.S.and M.S. degrees from the University of Arizona,Tucson, and the Ph.D. degree from Colorado StateUniversity, Fort Collins, all in electrical engineer-ing, in 1984, 1985, and 1994, respectively. Heis a Member of the Technical Staff at Hewlett-Packard's Manufacturing Test Division. He has over10 years of experience in design and test and is aFaculty Affiliate at Colorado State University. Hehas published several papers in the field of test.Tom W. Chen received the B.Sc. degree in elec-tronic engineering from Shanghai Jiao-Tong Uni-versity, China, and the Ph.D. degree in electricalengineering from the University of Edinburgh, Scot-land, UK, in 1982 and 1987, respectively.From 1987 to 1989, he was with Philips Semi-conductors in Hamburg, Germany. From 1989 to1990, he was with the Department of Electricaland Computer Engineering, New Jersey Instituteof Technology. He is currently an associate profes-sor at the Department of Electrical Engineering atColorado State University. His research interests are in the areas of novelarchitectures in computation and signal processing, VLSI design and testing,and real-time computer vision systems.

A clustered yield model for SMT boards and MCM's

https://mountainscholar.org/bitstream/10217/1205/1/ECEtwc00002.pdf

Clustered yield model for SMT boards and MCM's, A

Abstract

Similar works

Full text

Available Versions

Mountain Scholar (Digital Collections of Colorado and Wyoming)