This thesis presents the results of research in the area of automated recognition of digital logic schematics. The adaptation of a number of existing image processing techniques for use with this kind of image is discussed, and the concept of using sets of tokens to represent the overall drawing i s explained in detail. Methods are given for using tokens to describe schematic component shapes, to represent the connections between components, and to provide sufficient information to a parser so that an equation can be generated. A Microsoft Windows-based test program which runs under Windows 95 or Windows NT has been written to implement the ideas presented. This program accepts either scanned images of digital schematics, or computer-generated images in Microsoft Windows bitmap format as input. It analyzes the input schematic image for content, and produces a corresponding logical equation as output. It also provides the functionality necessary to build and maintain an image token library
