The main purpose of this article is to present how Petri Nets (PNs) have been
used for hardware design at our research laboratory. We describe the use of PN
models to specify synchronous parallel controllers and how PN specifications
can be extended to include the behavioural description of the data path, by using
object-oriented concepts. Some hierarchical mechanisms which deal with the
specification of complex digital systems are highlighted. It is described a design
flow that includes, among others, the automatic generation of VHDL code to synthesize
the control unit of the system. The use of PNs as part of a multiple-view
model within an object-oriented methodology for hardware/software codesign
is debated. The EDgAR-2 platform is considered as the reconfigurable target
architecture for implementing the systems and its main characteristics are shown
