We present the APE (Array Processor Experiment) project for the development
of dedicated parallel computers for numerical simulations in lattice gauge
theories. While APEmille is a production machine in today's physics simulations
at various sites in Europe, a new machine, apeNEXT, is currently being
developed to provide multi-Tflops computing performance. Like previous APE
machines, the new supercomputer is largely custom designed and specifically
optimized for simulations of Lattice QCD.Comment: Poster at the XXIII Physics in Collisions Conference (PIC03),
  Zeuthen, Germany, June 2003, 3 pages, Latex. PSN FRAP15. Replaced for adding
  forgotten autho

apeNEXT Collaboration

Bodin, F.

Boucaud, Philippe

Cabibbo, N.

De Luca, S.

De Pietri, R.

Di Carlo, F.

Di Renzo, F.

Kaldass, H.

Lonardo, A.

Lukyanov, M.

Micheli, J.

Morenas, V.

Paschedag, N.

Pene, O.

Pleiter, D.

Rapuano, F.

Rossetti, D.

Sartori, L.

Schifano, F.

Simma, H.

Tripiccione, R.

Vicini, P.

English

arXiv

We present the APE (Array Processor Experiment) project for the development of dedicated parallel computers for numerical simulations in lattice gauge theories. While APEmille is a production machine in today’s physics simulations at various sites in Europe, a new machine, apeNEXT, is currently being developed to provide multi-Tflops computing performance. Like previous APE machines, the new super- computer is largely custom designed and specifically optimized for simulations of Lattice QCD

F. BODIN

P.H. BOUCAUD

N. CABIBBO

F. DI CARLO

H. KALDASS

A. LONARDO

M. LUKYANOV

S. DE LUCA

J. MICHELI

V. MORENAS

O. PENE

D. PLEITER

N. PASCHEDAG

F. RAPUANO

D. ROSSETTI

L. SARTORI

F. SCHIFANO

H. SIMMA

R. TRIPICCIONE

P. VICINI

DE PIETRI, Roberto

DI RENZO, Francesco

Archivio istituzionale della Ricerca -  Università degli Studi di Parma

20 November 2022University of Parma Research RepositoryapeNEXT: A multi-TFlops Computer for Simulations in Lattice Gauge Theory / F. BODIN; PH. BOUCAUD; N.CABIBBO; F. DI CARLO; DE PIETRI R.; F. DI RENZO; H. KALDASS; A. LONARDO; M. LUKYANOV; S. DE LUCA;J. MICHELI; V. MORENAS; O. PENE; D. PLEITER; N. PASCHEDAG; F. RAPUANO; D.ROSSETTI; L. SARTORI; F.SCHIFANO; H. SIMMA; R. TRIPICCIONE; P. VICINI. - ELETTRONICO. - eConf C030626:(2003), pp. 384-386.((Intervento presentato al convegno 23rd International Conference on Physics in Collision (PIC 2003).tenutosi a Zeuthen, Germany nel 26-28 Jun 2003..OriginalapeNEXT: A multi-TFlops Computer for Simulations in Lattice Gauge TheoryPublisher:PublishedDOI:Terms of use:openAccessPublisher copyright(Article begins on next page)Anyone can freely access the full text of works made available as "Open Access". Works made availableAvailability:This version is available at: 11381/2297259 since: 2016-08-16T23:49:44ZSLACThis is the peer reviewd version of the followng article:Physics in Collision - Zeuthen, Germany, June 26-28, 2003apeNEXT: A MULTI-TFLOPS COMPUTER FOR SIMULATIONSIN LATTICE GAUGE THEORYapeNEXT-Collaboration: F. Bodin1, Ph. Boucaud2, N. Cabibbo3, F. Di Carlo3,R. De Pietri4, F. Di Renzo4, H. Kaldass5, A. Lonardo3, M. Lukyanov5,S. De Luca3, J. Micheli2, V. Morenas6, O. Pene2, D. Pleiter7, N. Paschedag5,F. Rapuano3, L. Sartori8, F. Schifano8, H. Simma5, R. Tripiccione8, P. Vicini3ABSTRACTWe present the APE (Array Processor Experiment) project for the developmentof dedicated parallel computers for numerical simulations in lattice gauge theories.While APEmille is a production machine in today’s physics simulations at varioussites in Europe, a new machine, apeNEXT, is currently being developed to providemulti-Tflops computing performance. Like previous APE machines, the new super-computer is largely custom designed and specifically optimized for simulations ofLattice QCD.1 IntroductionFor many non-perturbative problems in quantum field theory, numerical simulationson the lattice offer the only known way to compute various quantities from firstprinciples. Much progress has been made during recent years [1], e.g. in calculating1IRISA/INRIA, Campus Université de Beaulieu, Rennes, France2LPT, University of Paris Sud, Orsay, France3INFN, Sezione di Roma, Italy4Physics Department, University of Parma and INFN, Gruppo Collegato di Parma, Italy5DESY Zeuthen, Germany6LPC, Université Blaise Pascal and IN2P3, Clermont, France7NIC/DESY Zeuthen, Germany8Physics Department, University of Ferrara, Italy384the light hadron spectrum, the light quark masses, the running coupling constantαs or observables in heavy quark physics. Further-on, lattice simulations allow thestudy of phenomena, like chiral symmetry breaking and confinement, or of phasetransitions in the early universe.The computer resources required for such simulations are huge and criti-cally depend on the physical parameters, like quark masses, and the formulation ofthe theory on the lattice, e.g. with improved chiral properties. To make the necessaryresources available, various research groups engage in the development of massivelyparallel computers which are specifically optimized for this kind of applications. Oneof these projects is APE [2] which is currently developing its fourth generation ofmachines, apeNEXT, within the framework of an European collaboration by INFN(Italy), DESY (Germany) and the University of Paris Sud (France).2 apeNEXT ArchitectureapeNEXT is designed as a massively parallel computer following the Single ProgramMultiple Data (SPMD) programming model. All machine functionalities, includ-ing the network and memory interfaces, are integrated into one single custom chiprunning at a clock frequency of 200 MHz. The nodes run asynchronously and areimplicitly synchronized by communications.The processor core is a 64-bit architecture and all floating point operationsuse IEEE double precision format. A so-called normal operation a× b+ c, with a, b,and c complex numbers, can be started at each clock cycle. The peak performanceof each node is therefore 1.6 GFlops.Each node is a fully independent processor with 256–1024 MBytes privatememory (standard DDR-SDRAM with ECC) storing both program and data. SinceapeNEXT has very long instruction words (VLIW), microcode de-compression andinstruction buffers are used to reduce conflicts between data and instruction loading.A large number of 256 (64 + 64)-bit registers allows efficient data re-use.The high-performance communication network has a 3-d torus topology.Each link moves one byte per clock cycle and the startup latency of about 20 clockcycles, i.e. 100 ns, is very short. Communications and arithmetic operations can becarried out in parallel. By loading local or remote data through dedicated pre-fetchqueues one can almost perfectly exploit the concurrency between memory accesses,network transfers, and arithmetic operations.On an apeNEXT processing board 16 nodes are mounted, and 16 boards areinterconnected on the backplane within a crate. Larger systems are assembled by385connecting together several crates using external cables. Thus, a single rack systemwith 2 crates has 512 nodes and provides a peak performance of 0.8 TFlops. Thefootprint is about 1 m2 only and the estimated power consumption is < 10 kW. Dueto this very moderate power dissipation air cooling is still possible.apeNEXT systems are accessed from a front-end PC via a custom designedhost-interface PCI-board. It uses a simple I2C link for bootstrapping and basicoperating system requests, while I/O operations are handled via high-speed datalinks. By connecting one or more processing boards of an apeNEXT machine withhost-interface boards the overall I/O bandwidth can be adjusted to the user needs.Two high-level programming languages, TAO and C (with suitable exten-sions for parallelisation) are supported on apeNEXT. After further optimisation ofthe intermediate assembly, the microcode is generated, scheduled and compressed.3 Status and OutlookThe design of apeNEXT has been finished and prototype processors are to be deliv-ered in autumn 2003. All other hardware components exist and have been tested.The final procurement costs are estimated to be 0.5 /MFlops peak performance.The full VHDL design of the machine has been used for benchmarking.Key lattice gauge theory kernels were measured to run at a sustained performanceof O(50%) or more. While the apeNEXT design is optimized for simulating latticeQCD, we expect the architecture to be suitable also for other applications.European research groups in lattice gauge theory aim for large dedicatedinstallations of massively parallel computers during the next years. In Edinburgh(UK) a 10 TFlops QCDOC machine will be installed by 2004 and in Italy a 10 TFlopsapeNEXT installation is planned. In Germany researchers from various groups joinedthe Lattice Forum (LATFOR) initiative. They have set up a broad research program[3], assessed the required computing resources, and proposed a 15 and 10 TFlopsinstallation of apeNEXT hosted by NIC at DESY (Zeuthen) and GSI (Darmstadt).References1. For an overview see “Proceedings of the XXth International Symposium onLattice Field Theory,” Nucl. Phys. B (Proc. Suppl.) 119 (2003).2. R. Alfieri et al. [APE Collaboration], arXiv:hep-lat/0102011; R. Ammendola etal., arXiv:hep-lat/0211031; F. Bodin et al., arXiv:hep-lat/0306018.3. R. Alkofer et al., http://www-zeuthen.desy.de/latfor .386

apeNEXT: A multi-TFlops Computer for Simulations in Lattice Gauge Theory

We present the APE (Array Processor Experiment) project for the development of dedicated parallel computers for numerical simulations in lattice gauge theories. While APEmille is a production machine in today's physics simulations at various sites in Europe, a new machine, apeNEXT, is currently being developed to provide multi-Tflops computing performance. Like previous APE machines, the new supercomputer is largely custom designed and specifically optimized for simulations of Lattice QCD

apeNEXT: A multi-TFlops Computer for Simulations in Lattice Gauge Theory

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