Arsovski I.

Matsunaga S.

Natsui M.

Suzuki D.

 This paper presents an architecture-level approach, called nonvolatile logic-in-memory (NV-LIM) architecture, to solving performance-wall and power-wall problems in the present CMOS-only-based logic-LSI (Large-Scaled Integration) processors. The use of magnetic tunnel junction devices combined with a CMOS-gate style makes it possible to achieve a high-performance and ultra-low-power logic LSI. Some concrete examples using the proposed method allow you to achieve the desired performance improvement compared to a corresponding CMOS-only-based realization. </jats:p

CHALLENGE OF MTJ-BASED NONVOLATILE LOGIC-IN-MEMORY ARCHITECTURE FOR DARK-SILICON LOGIC LSI

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