We propose SANSCrypt, a novel sequential logic encryption scheme to protect
integrated circuits against reverse engineering. Previous sequential encryption
methods focus on modifying the circuit state machine such that the correct
functionality can be accessed by applying the correct key sequence only once.
Considering the risk associated with one-time authentication, SANSCrypt adopts
a new temporal dimension to logic encryption, by requiring the user to
sporadically perform multiple authentications according to a protocol based on
pseudo-random number generation. Analysis and validation results on a set of
benchmark circuits show that SANSCrypt offers a substantial output
corruptibility if the key sequences are applied incorrectly. Moreover, it
exhibits an exponential resilience to existing attacks, including SAT-based
attacks, while maintaining a reasonably low overhead.Comment: This paper has been accepted at the 28th IFIP/IEEE International
Conference on Very Large Scale Integration (VLSI-SoC