Al Abbas, Tarek

Chan, Susan

Dutton, Neale A. W.

Gyongy, Istvan

Henderson, Robert K.

Hutchings, Sam W.

Johnston, Nick

Leach, Jonathan

Tyler, Max

English

A 256 × 256 single-photon avalanche diode (SPAD) sensor integrated into a 3-D-stacked 90-nm 1P4M/40-nm 1P8M process is reported for flash light detection and ranging (LIDAR) or high-speed direct time-of-flight (ToF) 3-D imaging. The sensor bottom tier is composed of a 64 × 64 matrix of 36.72 μm pitch modular photon processing units which operate from shared 4 × 4 SPADs at 9.18 μm pitch and 51% fill-factor. A 16 × 14 bit counter array integrates photon counts or events to compress data to 31.4 Mb/s at 30-frame/s readout over 8 I/O operating at 100 MHz. The pixel-parallel multi-event time-to-digital converter (TDC) approach employs a programmable internal or external clock for 0.56-560-ns time bin resolution. In conjunction with a per-pixel correlator, the power is reduced to less than 100 mW in practical daylight ranging scenarios. Examples of ranging and high-speed 3-D ToF applications are given.</p

Heriot Watt Pure

A Reconfigurable 3-D-Stacked SPAD Imager with In-Pixel Histogramming for Flash LIDAR or High-Speed Time-of-Flight Imaging

Sam W. Hutchings

Nick Johnston

Istvan Gyongy

Tarek Al Abbas

Neale A. W. Dutton

Max Tyler

Susan Chan

Jonathan Leach

Robert K. Henderson

Crossref

A Reconfigurable 3-D-Stacked SPAD Imager With In-Pixel Histogramming for Flash LIDAR or High-Speed Time-of-Flight Imaging

A 256 × 256 single-photon avalanche diode (SPAD) sensor integrated into a 3-D-stacked 90-nm 1P4M/40-nm 1P8M process is reported for flash light detection and ranging (LIDAR) or high-speed direct time-of-flight (ToF) 3-D imaging. The sensor bottom tier is composed of a 64 × 64 matrix of 36.72-μm pitch modular photon processing units which operate from shared 4 × 4 SPADs at 9.18-μm pitch and 51% fill-factor. A 16 × 14 bit counter array integrates photon counts or events to compress data to 31.4 Mb/s at 30-frame/s readout over 8 I/O operating at 100 MHz. The pixel-parallel multi-event time-to-digital converter (TDC) approach employs a programmable internal or external clock for 0.56-560-ns time bin resolution. In conjunction with a per-pixel correlator, the power is reduced to less than 100 mW in practical daylight ranging scenarios. Examples of ranging and high-speed 3-D ToF applications are given

Edinburgh Research Explorer

https://www.research.ed.ac.uk/portal/files/113453281/JSSC2019Revisedv2NoHighlight.pdf

A Reconfigurable 3-D-Stacked SPAD Imager With In-Pixel Histogramming for Flash LIDAR or High-Speed Time-of-Flight Imaging

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Heriot Watt Pure

Crossref

Heriot Watt Pure

Edinburgh Research Explorer