Laurenson, David I.

Tadza, Nina

Thompson, John S.

In this paper, a comprehensive power performance analysis of a novel Adaptive Switching Algorithm for an iterative-MIMO system is investigated with the prime goal of minimizing energy consumption in the receiver. The algorithm works by switching between a high performance detection method, the Fixed Sphere Decoding, and a much lower complexity algorithm, the Vertical-Bell Laboratories Layered Space-Time Zero Forcing technique, controlled by a threshold according to the mutual information calculated during each transmission. Results show significant improvements over current non-adaptive receivers, where energy savings of more than 60% can be obtained using on the latest Xilinx&amp;#x00AE;Virtex- 7 FPGA hardware.</p

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Power performance analysis of the iterative-MIMO adaptive switching algorithm detector on the FPGA hardware

Nina Tadza

John S. Thompson

David I. Laurenson

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Power Performance Analysis of the Iterative-MIMO Adaptive Switching Algorithm Detector on the FPGA Hardware

https://www.pure.ed.ac.uk/ws/files/22200078/Power_Performance_Analysis_of_the_Iterative_MIMO_Adaptive_Switching_Algorithm_Detector_on_the_FPGA_Hardware.pdf

Power performance analysis of the iterative-MIMO adaptive switching algorithm detector on the FPGA hardware

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