To help settle some of the questions raised by the prospect of having a 4096-register magnetic memory in MTC (See Memorandum M-2361), this meeting of MTC personnel and programmer was arranged. Opinion was heavily in favor of a bank-switching instruction which could include drum fields as banks. Certain other features desirable from a programming standpoint were also brought up

Bagley, P. R.

Hosier, W. A.

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}«J OU-UJL Memorandum M-2Ulii Page 1 of k Division 6 - Lincoln Laboratory Massachusetts Ins t i tu te of Technology Cambridge 39, Massachusetts SUBJECT: MEETING TO DECIDE MTC MEMORY SELECTION SCHEME, SEPTEMBER 16, 1953 To: N. H. Taylor From: W. A. Hosier, P. R. Bagley Date: September 18, 1953 Abstract: To help s e t t l e some of the questions raised by the prospect of having a U096-register magnetic memory in MTC (See Memorandum M-2361), th is meeting of MTC personnel and programmers was arranged. Opinion was heavi ly in favor of a bank-switching instruction which could include drum f i e l d s as banks. Certain other features desirable from a programming standpoint were a l s o brought up. Persons attending: Group 63U5: C.W. Adams D.N. Ardan D. Combelic M.S. Demurjian H.H. Denman J »M» F.C. £•5 • J.D. A. Frankovitch Helwig Kopley Porter Siegel Group 61: W.A. Clark Group 62: P.R. Bagley W.A. Hosier R.P. Mayer Memorandum M-2361 outl ined four principal proposals for addressing a 6U x 6k memory in MTC| of these , the l a s t , adding a 17th d i g i t to the computer throughout, was abandoned because of time and manpower l imi ta t ions . Of the other three , a variation of proposal I (use of a spec ia l bank-switch instruct ion) was unanimously supported, since i t of a l l the proposals implied the p o s s i b i l i t y of addressing the drum, treat ing drum f i e l d s in exact ly the same way (from the programming standpoint) as the two 20u8-word banks of the magnetic-core memory. Under th i s plan, there would be two four-bit r e g i s t e r s control l ing bank s e l e c t i o n : f i r s t , the "Program Timing Bank Selector", e f f e c t i v e l y an extension of the program counter, indicat ing from which bank instructions are t o be taken} second, the "Operation Timing Bank Selector", e f f e c t i v e l y an i m p l i c i t extension of the addresses of instruct ions , indicat ing from which bank to take the numbers, e t c . , manipulated by the ins truct ions . APPROVED FOR PUBLIC RELEASE. CASE 06-1104.Memorandum M-2blh Page 2 Within the 20lj8 registers of a bank, addressing would of course be done with the usual 11 address bits* the 6h registers of Panel Storage (toggle-switch and plugboard) would be treated as a distinct bank in themselves. Making allowance for a possible 12 drum fields, then, this scheme leads to 15 "banks* in all, addressed in the following manner: (octal addresses) Address Refers to Memory Section Bank Selector Setting 0 - 3777 Panel Storage (repeats modulo 61*) 0000 UOOO - 13777 Magnetic Core Memory 0001 - 0010 lliOOO - 73777 Magnetic Drum 0011 - 1110 incl. An alternative addressing scheme, slightly less favored as being a bit more complex to implement and as requiring sacrifice of 6ii registers of core memory, is the following: 0 - 77 Panel Storage 0000 100 - 3777 Magnetic Cores, Bank A 0000 lOOO - 7777 Magnetic Cores, Bank B 0001 10000 - 67777 Magnetic Drum 0010 - 1101 incl. The principal question raised by this plan is the exact manner of effecting a "transfer of control" (i.e., reset the program counter, MTC tr and tn, corresponding to WWT sp and cp). Usually the new instruction location will be in the same bankwhere the program is, but occasionally one will want to transfer out of the bank, and this requires 15 bits of address. Further, it is highly desirable to accomplish the transfer in one instruction, especially if it is a conditional transfer: this means having a preset bank indication available when the tr or tn is executed. The technique of transferring to the address indicated" in ÊKe register whose address is given by the transfer instruction was rejected as being clumsy both from a pro-gramming and electronics point of view; it was agreed that the best solution would be a transfer instruction which resets the program counter to agree with the (previously set) operation timing bank selector. To avoid the necessity of resetting the latter when transferring inside a bank in a program whose addresses are largely outside the bank, it was thought that a special "inside transfer" instruction would be helpful, which would always leave the bank-selection digits of the program counter undisturbed. For this purpose one could make use of the positions now occupied in the MTC instruction code by the instructions tp and np. Thus, in sum, to take care of the 6ii x 6!i memory and, as a by-product, to address the magnetic drum in like Manner, three instructions will be added: 1. a "bank-select" instruction (bk?) 2. a "transfer-inside" instruction (ti?) 3. a conditional or "negative transfer inside" Instruction (ni?) It was not contemplated, at least for the present, to install block transfer instructions or to group all in-out operations under a general APPROVED FOR PUBLIC RELEASE. CASE 06-1104.Memorandum M-2lilij Page 3 instruction like WWI's si. Block transfers between drum and core memory, if made in MTC, will thus be a succession of single-word transfers, and necessarily somewhat slower than the WWI type. Some minor aspects of the system discussed were there: 1. It might be a help to be able to read out of the bank selector. 2. For using floating-address routines, it would be desirable to have the program counter carry from the end of one bank to the beginning of the next. Aside from the question of memory bank selection, Prof. Adams and his group brought up several features they would like to see incorporated into MTC, principally to facilitate extra-precision arithmetic and floating-binary-point routines: 1. Changes in the overflow alarm system. Instead of sensing the overflow-storing flip-flop at the end of the instruction which has generated the overflow, they suggest sensing it at the beginning of the next instruction, with consequences varying according to 6 5 nature of the next instruction. Thus "shift right* would merely shift contents, of the overflow FF into ACO and clear the formerj a "transfer on overflow" would be possiblej most other instructions, not intended to make specific use of an overflow, would ignore it or cause an alarm. Probably can be done with very little trouble. 2. A "scale-factor" instruction. This implies the ability to shift left in AC and BR. Might be added when MTC is moved, especially if new FF's with bufferless gates are put into AC and BR, thus freeing space where buffers were on shift-gate panels. 3. Alteration of paper-tape reading setup to use 7th hole as a parity indicator. They say read-in errors have been frequent on WWI« Perhaps the Ferranti reader may improve reliability to the point of making this unnecessary^ at any rate it should be considered. h» Possible use of a 2's complement representation for negative numbers instead of the present l's complement. This would be much neater for adding modulo 2, ignoring overflow, but is unlikely for now. Not mentioned, but possibly of interest, are instructions of the absolute value sort (WWI's cm, am, dm). APPROVED FOR PUBLIC RELEASE. CASE 06-1104.Memorandum M-2I1II4. Page k Prof. Adams said his group would give thought to delegating some-one to act as liaison with MTC; he was assured that a desk would be made available in the MTC area any time he should need it. ^Xu\ //t^u~^> Signed:_ W. A. Hosier WAH/rb 001 J.D. Crane H.3. Henegar R.A. Hughes W. Ogden R.R. Everett APPROVED FOR PUBLIC RELEASE. CASE 06-1104.

Meeting to Decide MTC Memory Selection Scheme, September 16, 1953

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Meeting to Decide MTC Memory Selection Scheme, September 16, 1953

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