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Impact of silicon nitride gate dielectric composition on the stability of low temperature nanocrystalline silicon thin film transistors
Authors
,
GR Chaji
+5 more
MR Esmaeili-Rad
F Li
M Moradi
A Nathan
A Sazonov
Publication date
2 August 2011
Publisher
Abstract
We report on the stability of nanocrystalline silicon (nc-Si) bottom gate (BG) thin film transistors.(TFTs) with various compositions ([N]/[Si]) of hydrogenated amorphous silicon nitride (a-SiNx:H) gate dielectric, formed at 280°C. The shift in threshold voltage (ΔVT) is larger for gate dielectrics with lower [N]/[Si] content. For example, after 5 hours of stressing at 15 V, the ΔVT is 0.3 V, 1 V, and 12.4 V for [N]/[Si] of 1.3, 1.2, and 1, respectively. Relaxation tests on the stressed TFTs show that the charge trapping in the gate dielectric is the primary instability mechanism in nc-Si BG TFTs. ©The Electrochemical Society
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Last time updated on 15/07/2020