A novel closed-loop capacitance-to-pulse width converter (CPC) suitable for single element capacitive sensors that use sinusoidal excitation is presented in this paper. Its operation is realized using a new configuration based on a simple,
yet effective, auto-balancing scheme. The hardware prototype of the proposed CPC is relatively less complex to implement than those presented so far in the literature. It provides a quasi-digital output at a high update rate. Additionally, the output is insensitive to parasitic capacitances of the sensor. The output possesses high linearity, with respect to change in the sensor capacitance, ranging +/-5 pF, with a nominal capacitance as high
as 200 pF. It exhibits a maximum non-linearity error of 0.061%FS. The output of the prototype has a resolution of 13.31 bits. Also, its response time for a step-change in the sensor capacitance is about 13 ms. This sophisticated and inexpensive closed-loop CPC is a perfect fit as an interfacing circuit for single element capacitive sensors.Peer ReviewedPostprint (author's final draft

Areekath, Lakshmi

George, Boby

Reverter Cubarsí, Ferran

English

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 A Closed-Loop Capacitance to Pulse-Width Converter for Single Element Capacitive Sensors Lakshmi Areekath1, Student Member, IEEE, 	Boby George1, Senior Member, IEEE, and Ferran Reverter2 1Department of Electrical Engineering, Indian Institute of Technology Madras, Chennai, India. Email: ee17d014@smail.iitm.ac.in 2Department of Electronic Engineering, Universitat Politècnica de Catalunya, Barcelona, Spain. Email: ferran.reverter@upc.edu  Abstract — A novel closed-loop capacitance-to-pulse width converter (CPC) suitable for single element capacitive sensors that use sinusoidal excitation is presented in this paper. Its operation is realized using a new configuration based on a simple, yet effective, auto-balancing scheme. The hardware prototype of the proposed CPC is relatively less complex to implement than those presented so far in the literature. It provides a quasi-digital output at a high update rate. Additionally, the output is insensitive to parasitic capacitances of the sensor. The output possesses high linearity, with respect to change in the sensor capacitance, ranging +/-5 pF, with a nominal capacitance as high as 200 pF. It exhibits a maximum non-linearity error of 0.061%FS. The output of the prototype has a resolution of 13.31 bits. Also, its response time for a step-change in the sensor capacitance is about 13 ms. This sophisticated and inexpensive closed-loop CPC is a perfect fit as an interfacing circuit for single element capacitive sensors.  Keywords-Capacitance to pulse-width converter; Capacitive Sensor; Sinusoidal excitation; Closed-loop; Digitizer. I.  INTRODUCTION  Capacitive sensors have myriad applications in the fields ranging from consumer electronics to automobiles, healthcare, and automation [1]. They are used to measure displacement [2], acceleration [3], flow-rate [4], and humidity [5] and perform motion tracking [6]. The interfacing circuits that translate the change in the capacitance value to data in either an analogue or a digital domain, follow conversion paradigms that convert the sensor capacitance to either voltage [7], current [8], phase [9], frequency [10], time period [11][12] or pulse-width [13]. Choosing the appropriate conversion technique depends on factors such as the type of excitation source employed, the nature of the dielectric used in the sensor, desired resolution, and update rate.  Some capacitive sensors, such as the ones used to measure humidity [5] or evaluate agricultural biomass flow [13], require sinusoidal excitation to effectively sense the measurand. Circuits in [4], [5] and [14]-[18] which have used an ac excitation source, have not used a closed-loop configuration. However, the closed-loop approach enables the circuit to achieve higher accuracy, and update rate, compared to an open-loop configuration [19]. The circuits in [10] and [11], though designed as closed loops, are meant for differential and lossy capacitive sensors, respectively. In addition to this, these attempts have not explored the possibility of capacitance to pulse width conversion, which could be achieved with minimal components, keeping the complexity low. The few works that have adopted pulse width modulation, based on the change in sensor capacitance, as the method of capacitance to digital conversion such as [13], [20] and [21] are not suitable for conversion of the output of a single element capacitive sensor connected to a sinusoidal excitation source. For instance, in [13] a square-wave is used instead of a sinusoidal excitation source, [20] uses a dc source and [21] neither uses a sinusoidal excitation source nor is designed for a single element capacitor. Also, these have not been designed as closed-loop circuits. In this paper, a novel closed-loop capacitance-to-pulse width converter (CPC) for single element capacitive sensors is presented. The proposed circuit employs sinusoidal ac excitation to the sensor. It is based on an auto-balancing circuit configuration, providing an output in a quasi-digital format, which can be easily interfaced with digital systems [22]. The update rate possible in this approach is relatively high and the output is highly linear with respect to the change in the sensor capacitance. The output is insensitive to parasitic capacitance. The new CPC, its operation, simulation, and experimental results are presented in sequel. II. CAPACITANCE TO PULSE-WIDTH CONVERTER The circuit diagram of the proposed capacitance to pulse-width converter (CPC) is shown in Fig. 1. Here, the sensor capacitance , feedback capacitor  and opamp OA1 constitute a charge amplifier. Similarly, the reference capacitance , feedback capacitor  and opamp OA2 form another charge amplifier. The sinusoidal excitation signal =√2  is given to both  and . = 2 , where  the frequency of excitation, and  is the root mean square (rms) voltage. The outputs  and  of the charge amplifiers, can be written as in (1). =	− √2  and =	− √2    (1) As in Fig. 1, 	  is also given to the non-inverting terminal of the comparator OC1. Its output vc1 is high during the positive half cycles of . It is low otherwise. vc1 controls the SPDT switches, S1 and S2. The inputs to S1 are , and inverted . Similarly,  and −  are the inputs to the switch S2, as shown in Fig. 1. The output of S1 is connected to another SPDT switch S3, which is controlled by the feedback pulse signal, vc2. The outputs of S3 and S2 are given to a summing integrator consisting of input resistors R1 and R2 (R1 = R2 = R), feedback capacitor  and opamp OA3. The output  of this integrator is connected to the non-inverting terminal of the comparator OC2. It is compared with a            Fig. 1. Block diagram of the proposed capacitance to pulse width converter.  is the sensor capacitance.          - i t  rt r.  i  t  r it . triangular signal Vtri with time period, = 1/ , and peak value Vp.  vc2 is high for Vtri < , and low otherwise. In the proffered CPC, ≫ . When  = 0, the pulse width of vc2 is 2⁄ . As  increases in the positive direction, the duration , for which vc2 is high, increases, and the duration , for which vc2 is low, decreases. The opposite occurs if  decreases from zero and goes negative. A.  Theory of Operation In the proposed CPC, given in Fig. 1, the feedback capacitors  and  are chosen such that = 2 , in order to have a duty cycle of 50 % when = . Initially, let   =  . Under this condition, output  of S1 and output  of S2 can be written as in (2).   =	 √2  and =	− √2  (2)         will drive a current  to the summing integrator as shown in Fig. 1. The average value, , of  for one cycle of  is        =	 − √2 = − ,                (3) where = √  and = 1/ .   The signal   goes to one of the input terminals of S3, which is controlled by vc2. Output 	of S3 is , whenever vc2 is high, and zero, otherwise. Thus, the average value, , of current , shown in Fig. 1, for one cycle of  can be written as in (4). In (4), the duty cycle = /( ) and = ( ).       =	 ∑ √2    (4) As in (4),  is directly proportional to . In addition, it is a function of . For = 100%,  the S3 is always at position-1 and so, the waveform of  will be the same as that of . For = 50%, since ≫ ,  the   waveform will be close to a digital to analog converter output waveform, following the absolute value of  whenever vc2 is high and zero otherwise.  This is illustrated in Fig. 2.  If the top portions of each non zero segment of   is assumed to be flat, the segments become rectangular blocks. This approximation will introduce negligible error for ≫ . Under this condition, the average value of  will vary proportional to  of vc2.  Thus, the value of   computed using (4) can be made directly proportional to . This is illustrated in Fig. 3 which is computed by varying , while maintaining a fixed value of . It can be seen that the curve is linear once the condition  ≫  is satisfied.  As indicated in Fig. 3, for the case ≫ ,    is directly proportional to  . It is a straight line passing through origin, with maximum value equal to 2 . For = 50%,  | | 	= Fig. 2. Output of switch S3, for a vc2 with = 50%.   2 = = | |. In this condition, = 0 and vc2 will be high for 50% of 	 . When , initially | | | |. This will drive  into negative side. Hence,  of vc2 will decrease and  increase, decreasing . This process will continue until | | 	= −| | and  settles at a constant voltage. For , the opposite occurs.  Since   is directly proportional to  and , when  increases there will be a corresponding decrease in  , due to the negative feedback, to ensure that | | 	= −| |. Under this condition, 2 = . For a sensor with linear characteristic = (1 ), where  is the measurand, , the transformation constant of the sensor, and , its nominal capacitance, keeping = , 2 =  can be rewritten as (1 )2 = 1 for 		0. Or  can be expressed as in (5).   = − 1 = 	 .   (5) The output signal vc2 can be given to a digital system, e.g., a timer module in a suitable microcontroller to measure the time  and  and (5) can be computed in the digital system to get the digital value of the measurand . In certain application, the absolute value of  or the change ∆  in  will be required.  and ∆  can be obtained in terms of  and  as given in (6) and (7) respectively.  = =              (6)        ∆ = 	      (7)  III. EXPERIMENTAL SETUP AND RESULTS  The prototype of the proposed CPC was realized using the components and ICs, given in Table-I, according to the circuit diagram in Fig. 1.  was emulated using a variable reference capacitor, with negligible leakage conductance. The entire system was powered by ±10 V power supply. During the experiment, the important waveforms of the prototype were observed using a digital oscilloscope. A screenshot of the oscilloscope is shown in Fig. 4. , 	 ,	  and vc2 corresponding to , are visible in Fig. 4. Since , the amplitude of the  is higher than that of . This causes  to be negative and thus, .  A. Testing the Linearity and Accuracy In order to test the linearity, the prototype was operated with  = 200 pF and   was varied from 195 pF and 205 pF in steps of 1 pF. For each value of , the  and  were measured using the 32-bit timer module of microcontroller ATSAM3X8E, from Atmel. This was also simultaneously measured and verified using an oscilloscope. The duty cycle,  , in each case was determined. The plot of  ⁄  vs 1/2  is given in Fig. 5. The relationship between these two was observed to be highly linear, with the maximum non-linearity error (NLE) being 0.061%FS, also indicated in Fig. 5. The output has high accuracy, with the maximum percentage error being 0.062%FS.  B. Testing the SNR, Resolution, and Repeatability The tests to ascertain the signal-to-noise ratio (SNR), the resolution (in terms of effective number of bits (ENOB)) and the repeatability, were conducted by setting  = 150 pF, recording the output of the CPC for 50 consecutive measurements, followed by using the appropriate formulae given in Table-II. The results are presented in the same table. C. Rise Time  TABLE-I: PROTOTYPE  Component Part/Value Component Part/Value  5 Vpp, Using AFG3022B  500 Hz Vtri Using AFG3022B  10 kHz  -  MAX4709 Vp 5 V  200 pF 	  OP07  LM311  2 nF ,  100 kΩ  1 nF      Fig. 3. Average value of  computed as per (4), for different values of  (in %) starting from 0 to 100 in steps of 1. It is a straight line for ≫ . The relationship is non-linear otherwise as seen by the blue ( = ) and red ( = 2 ) curves.   Fig. 4. Screenshot of the oscilloscope showing the important waveforms fromthe prototype developed. The frequency of  was set at 500 Hz, and that of was set at 10 kHz while recording this waveform.  In order to determine the rise time of the proposed CPC a new capacitance,  = 68 pF, was introduced in parallel to  and then removed using an SPDT switch controlled by a signal .  was fixed to 200 pF.  was added to , when  was low, and removed when  was high.  goes to a negative value when  is added, because  > , and returns to zero when  is removed as then  = .  The screenshot of the oscilloscope indicating  and   is given in Fig. 6. The time taken for  to rise from 10% to 90% of its final value was found to be 13 ms.    IV. CONCLUSION A novel closed loop capacitance to pulse-width converter (CPC) is presented in this paper. This is suitable for single element capacitive sensors with sinusoidal excitation. The proposed CPC is designed based on an auto-balancing scheme. It provides a quasi-digital output, which is insensitive to parasitic capacitance, at an update rate of 10 kHz. The update rate can be further increased by increasing the frequency  of the triangular waveform. The results from the hardware prototype developed and tested showed high linearity with a percentage non-linearity error of 0.061%FS, with respect to the sensor capacitance varied by +/-5 pF, with an offset or nominal capacitance 200 pF. The CPC does not use any expensive components or ICs and yet, provided a resolution of 13.31 bits (ENOB). The response time was in the range of 13 ms. The proffered simple and inexpensive closed-loop CPC is an efficient interfacing scheme for capacitive sensors in applications such as proximity sensing [17], humidity [5], flow rate [13] and displacement measurements [23].  V. ACKNOWLEDGMENTS The authors would like to thank Department of Science and Technology (DST), Govt. of India, for its financial assistance (Grant Number SERB/F/4573/2016-17) in carrying out the research activities presented in this paper. VI. REFERENCES  [1] L. K. Baxter, Capacitive Sensors Design and Applications. New York: IEEE Press, 1997. [2] C. C. Lin and N. C. Tsai, “Air-gap detection circuit using equivalent capacitive changes for inductive micromotor,” IEEE Sens. J., vol. 15, no. 3, pp. 1611–1623, Mar. 2015. [3] C. K. Chan, S. C. Lo, Y. C. Huang, M. Wu, M. Y. Wang, and W. Fang, “Poly-Si based two-axis differential capacitive-sensing accelerometer,” IEEE Sens. J., vol. 12, no. 12, pp. 3301-3308, 2012. [4] S. C. Bera and H. Mandal, “A flow measurement technique using a non-contact capacitance-type orifice transducer for a conducting liquid,” IEEE Trans. Instrum. Meas., vol. 61, no. 9, pp. 2553–2559, Sep. 2012. [5] J. Das, S. Dey, S. M. Hossain, Z. M. C. Rittersma, and H. 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A Closed-loop capacitance to pulse-width converter for single element capacitive sensors

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A Closed-loop capacitance to pulse-width converter for single element capacitive sensors

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