This thesis investigates the design of fault tolerant and fault secure (FTFS)
systems within the framework of silicon compilation. Automatic design modification
is used to introduce FTFS characteristics into a design. A taxonomy
of FTFS techniques is introduced and is used to identify a number of features
which an "automatic design for FTFS" system should exhibit.
A silicon compilation system, Chip Churn 2 (CC2), has been implemented
and has been used to demonstrate the feasibility of automatic design of FTFS
systems. The CC2 system provides a design language, simulation facilities and
a back-end able to produce CMOS VLSI designs. A number of FTFS design
methods have been implemented within the CC2 environment; these methods
range from triple modular redundancy to concurrent parity code checking. The
FTFS design methods can be applied automatically to general designs in order
to realise them as FTFS systems.
A number of example designs are presented; these are used to illustrate
the FTFS modification techniques which have been implemented. Area results
for CMOS devices are presented; this allows the modification methods to be
compared. A number of problems arising from the methods are highlighted and
some solutions suggested
