'Institute of Electrical and Electronics Engineers (IEEE)'
Abstract
The Communication Architecture Template Tree (CATtree)
is an abstraction of the specific range of communication
functions and architectures, which can facilitate system
function capture and communication architecture refinement.
In this paper, we explain a TLM-RTL-SW mixedlevel
simulation environment that is useful for the functional
verification of partially refined system models. We
employed SystemC, GNU Gdb and a HDL simulator for the
simulation of CATtree-based TLM, SW and HW, respectively.
We also employed a new operating system, DEOS so
that each SystemC-based TLMs can be cross-compiled to
be executed as software models on the target processors.
We evaluated the flexibility and simulation performance of
the virtual simulation environment with an H.264 decoder
design example
