The data acquisition system (DAQ) for a highly granular analogue hadron calorimeter (AHCAL) for the future International Linear Collider (ILC) will be presented. The developed DAQ chain has several stages of aggregation and scales up to 4 million channels in the main barrel foreseen for the AHCAL design. The front-end electronics will be embedded in the detector layers in between absorber plates without active cooling. The ILC has a specific timing of <1 ms active recording followed by 199 ms of slow readout, which allows the detector to be operated in power-pulsing mode in order to meet the power dissipation budget. This timing is reflected in the architecture of the DAQ from the very front-end ASIC embedded in the detector layers between absorber plates to the largest link aggregation device, the LDA (Link data aggregator), which has 96 HDMI connectors matching the AHCAL steel absorber plate spacing, four Kintex7 FPGAs and a central Zynq SoC (System-On-Chip). The LDA meets the ILC timing and bandwidth, which will be shown. The same DAQ is used also for AHCAL prototype beam tests, which require rather continuous data taking. DAQ architecture, data flow, timing and performance will be presented in detail. The performance has been demonstrated in recent beam tests at CERN at the PS in 2014 and at the SPS in 2015
