'Institute of Electrical and Electronics Engineers (IEEE)'
Abstract
The paper details on-chip inductor optimization
for a reconfigurable continuous-time delta-sigma (Δ-Σ) modulator
based radio-frequency analog-to-digital converter. Inductor
optimisation enables the Δ-Σ modulator with Q enhanced LC tank
circuits employing a single high Q-factor on-chip inductor and
lesser quantizer levels thereby reducing the circuit complexity for
excess loop delay, power dissipation and dynamic element
matching. System level simulations indicate at a Q-factor of 75 Δ-
Σ modulator with a 3-level quantizer achieves dynamic ranges of
106, 82 dB and 84 dB for RFID, TETRA, and Galileo over
bandwidths of 200 kHz, 10 MHz and 40 MHz respectively
