'Institute of Electrical and Electronics Engineers (IEEE)'
Abstract
Performance of conventional digital current controllers is constrained by transport delays within the feedback acquisition chain, as well as by delays inherent to the pulse width modulation. In this paper, we introduce a novel current controller which provides a very high closed-loop bandwidth, improves the robustness and disturbance rejection, and eliminates the noise and sampling errors in the feedback path. In order to achieve these goals, we suppress the transport delays by introducing an improved execution schedule of the control interrupt and by inserting a cascaded multiplier of differential character. With the novel gain setting rule, the closed loop bandwidth reaches 17% of the sampling frequency, disturbance rejection capability is doubled, the step response has a negligible overshoot, and the robustness is characterized by the vector margin of 0.65. Experimental verification is performed using an experimental setup with a three-phase inverter, digital controller, and a permanent magnet synchronous motor
