'Institute of Electrical and Electronics Engineers (IEEE)'
Abstract
Digital current controllers have the key impact on the performance of grid-side converters and ac drives. The voltage disturbances are commonly suppressed by enhancing the controller with an inner active resistance feedback. In cases where the switching noise and parasitic oscillations introduce sampling errors, conventional sampling is replaced by the oversampling-based error-free feedback acquisition which derives the average of the measured currents over the past switching period. The time delay introduced into the feedback path creates difficulties in designing the current controller with the active resistance. In this paper, we introduce a novel structure of the current controller which includes the error-free sampling and the active resistance feedback. Devised structure improves the disturbance rejection by extending the range of permissible values of the active resistance. Controller structure is based on the internal model principles and it maintains the input step response unaffected. The paper comprises analytical design, the gain setting procedure, computer simulation and experimental results obtained from an experimental setup with a three-phase inverter, digital controller, and a permanent magnet synchronous motor
