Halonen, Kari A.I.

Kantanen, Mikko

Karaca, Denizhan

Parveg, Dristy

Vahdati, Ali

Varonen, Mikko

English

This paper validates a design and modeling methodology of coupled slow-wave waveguides (CS-CPW) by presenting a D-band CMOS low-noise amplifier (LNA) that utilizes the CS-CPW for impedance matching. The robustness and feasibility of using the CS-CPW as a matching element in wideband millimeter-wave (mm-wave) silicon circuit designs are studied. Furthermore, the key design details of a mm-wave LNA are discussed. The designed monolithic microwave integrated circuit amplifier has a gain greater than 10 dB from 135 to 170 GHz with a peak gain of 15.7 dB at 160 GHz. The amplifier has a measured noise figure of 8.5 dB from 135 to 170 GHz, and an output-referred 1-dB compression point of -16.5 dBm at 160 GHz. The total power consumption of the amplifier is 32 mW.</p

VTT Research System

Design of a D-Band CMOS Amplifier Utilizing Coupled Slow-Wave Coplanar Waveguides

https://cris.vtt.fi/ws/files/23999421/TMTT_FINAL_VERSION.pdf

Design of a D-Band CMOS Amplifier Utilizing Coupled Slow-Wave Coplanar Waveguides

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