Chen, Jhih-bin

The IEEE 802.11a has become the mainstream protocol used in modern wireless communication system due to its high propagation rate of data (54 Mb/s). In order to keep RF receiver to operate at linear region under receiving strong signal, the gain of low noise amplifier must be tunable to avoid influencing the subsequent block. Traditional variable gain low noise amplifier is mainly adopted in cascade. Owing to the cascade includes amplifier, attenuator and buffer stages, the more complexity and power consumption increased.
This thesis utilizes dual stage to simplify complexity of the circuit and variable gain low noise amplifier fabricated in TSMC 0.18 \uc2\ub5m CMOS technology for IEEE 802.11a application. Without sacrificing gain, the variable gain low noise amplifier employ current-reuse structure to amplifier stage to reduce power consumption, variable-impedence structure to load stage to achieve variable gain, source follower structure to buffer to improve output matching, N-type diode load and source-degeneration structure to input stage to improve input matching.
The proposed variable gain low noise amplifier with 1.1 mm \uc3 1.1 mm chip size and its 5.2 GHz operating frequency is well suited for IEEE 802.11a (5~6 GHz) application. Measurement resutls demonstrate the highest and lowest gain of 15.29 and 8.19 dB respectivly, the gain tuning range is approximated as 7.1 dB. Moreover, the amplifier shows input return loss of -16.17 dB (highest gain mode)/-15.2 dB (lowest gain mode) and very good output return loss of -17.22 dB (highest gain mode)/-19.1 dB (lowest gain mode). Simultaneously, the amplifier shows isolation of -39.42 dB (highest gain mode)/-38.72 dB (lowest gain mode). Finally, a moderate consuming power are 16.05 mW (highest gain mode)/15.3 mW (lowest gain mode) of such varible gain low noise amplifier can be achieved from 1.6 V supply voltage

Design of Variable Gain Low Noise Amplifier for IEEE 802.11a Application

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