Emulation of a prototype FPGA track finder for the CMS Phase-2 upgrade with the CIDAF emulation framework

Abstract

The CMS collaboration is preparing a major upgrade of its detector, so it can operate during the high luminosity run of the LHC from 2026. The upgraded tracker electronics will reconstruct the trajectories of charged particles within a latency of a few microseconds, so that they can be used by the level-1 trigger. An emulation framework, CIDAF, has been developed to provide a reference for a proposed FPGA-based implementation of this track finder, which employs a Time-Multiplexed (TM) technique for data processing.The research leading to these results has received funding from the People Programme (Marie Curie Actions) of the European Unions Seventh Framework Programme FP7/2007- 2013/ under REA grant agreement n [317446] INFIERI “Intelligent Fast Interconnected and Efficient Devices for Frontier Exploitation in Research and Industry”. This work was supported in part by the the UK Science and Technology Facilities Council, we gratefully acknowledge their support