Research into components needed to utilize the THz region of the electromagnetic spectrum has recently gained more attention due to advances in semiconductor technology and materials science. These advances have led to the desire of create CMOS focal plane arrays (FPA) for THz imaging in a range of applications such as astronomy, security, earth science, industry, and communications. Si-MOSFETs are being investigated as the sensing node in THz FPAs due to their ability to detect THz and their ease of integration into the CMOS process facilitating the fabrication of large format arrays. To investigate the performance of devices fabricated at a commercial foundry, a test chip containing MOSFETs with appropriately sized dipole bowtie antennae were fabricated using a 0.35 micron CMOS process. A number of fabrication parameters were varied including both MOSFET geometry and antenna design to investigate optimizing detection for the 200 GHz atmospheric window. To test these devices an experimental low noise setup comprising of a lock-in amplifier, low noise current pre-amplifier, and various low noise techniques has been assembled. Different biasing conditions and temperature were used to analyze the mechanisms of detection and find the best operating parameters. The devices that implemented a 2 µm source extension, and antennae attached to the source and gate region yielded the largest response to 200 GHz incident radiation. The peak THz response varied little between room temperature and when cooled to 130K. Responsivities as high as 4.5 mA/W were measured and NEP as low as 6 nW/√Hz were achieved at room temperature. These results show agreement with other works regarding THz response to temperature and different biasing conditions
